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參數(shù)資料
| 型號： | AD9980/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION AD9980 |
| 標準包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻處理 |
| 已用 IC / 零件： | AD9980 |
| 已供物品： | 板 |
| 相關產品： | AD9980KSTZ-95-ND - IC INTERFACE 8BIT ANALOG 80LQFP AD9980KSTZ-80-ND - IC INTERFACE 8BIT ANALOG 80LQFP |
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AD9980
Rev. 0 | Page 15 of 44
SYNC
PROCESSOR
AND
VSYNC FILTER
PLL CLOCK
GENERATOR
COAST
HSYNC
HSYNC/VSYNC
COUNTER
REG 26H, 27H
HSYNC FILTER
AND
REGENERATOR
CHANNEL
SELECT
HSYNC
SELECT
FILTERED
HSYNC
REGENERATED
HSYNC
SET POLARITY
ACTIVITY
DETECT
AD9980
HSYNC0
HSYNC1
SOGOUT
VSYNCOUT
DATACK
ODD/EVEN
FIELD
COAST
04740-012
POLARITY
DETECT
MUX
ACTIVITY
DETECT
POLARITY
DETECT
ACTIVITY
DETECT
VSYNC0
VSYNC1
POLARITY
DETECT
MUX
ACTIVITY
DETECT
POLARITY
DETECT
SOGIN0
SOGIN1
ACTIVITY
DETECT
MUX
ACTIVITY
DETECT
SYNC
SLICER
SYNC
SLICER
Figure 8. Sync Processing Block Diagram
Sync Processing
The inputs of the sync processing section of the AD9980 are
combinations of digital Hsyncs and Vsyncs, analog sync-on-
green, or sync-on-Y signals, and an optional external Coast
signal. From these signals it generates a precise, jitter-free (9%
or less at 95 MHz) clock from its PLL; an odd-/even-field signal;
Hsync and Vsync out signals; a count of Hsyncs per Vsync; and
a programmable SOG output. The main sync processing blocks
are the sync slicer, sync separator, Hsync filter, Hsync regen-
erator, Vsync filter, and Coast generator.
The sync slicer extracts the sync signal from the green graphics
or luminance video signal that is connected to the SOGIN input
and outputs a digital composite sync. The sync separator’s task
is to extract Vsync from the composite sync signal, which can
come from either the sync slicer or the Hsync input. The Hsync
filter is used to eliminate any extraneous pulses from the Hsync
or SOGIN inputs, outputting a clean, low-jitter signal that is
appropriate for mode detection and clock generation. The
Hsync regenerator is used to recreate a clean, although not low
jitter, Hsync signal that can be used for mode detection and
counting Hsyncs per Vsync. The Vsync filter is used to elimi-
nate spurious Vsyncs, maintain a stable timing relationship
between the Vsync and Hsync output signals, and generate the
odd/even field output. The Coast generator creates a robust
Coast signal that allows the PLL to maintain its frequency in
the absence of Hsync pulses.
Sync Slicer
The purpose of the sync slicer is to extract the sync signal from
the green graphics or luminance video signal that is connected
to the SOGIN input. The sync signal is extracted in a two step
process. First, the SOG input is clamped to its negative peak,
(typically 0.3 V below the black level). Next, the signal goes to a
comparator with a variable trigger level (set by Register 0x1D,
Bits [7:3]), but nominally 0.128 V above the clamped level. The
sync slicer output is a digital composite sync signal containing
both Hsync and Vsync information (see Figure 9).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9981 | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 10-Bit Display Interface |
| AD9981/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 10-Bit Display Interface |
| AD9981/PCBZ | 制造商:Analog Devices 功能描述:Evaluation Board For The High Performance 10-Bit Display Interface 制造商:Analog Devices 功能描述:EVAL BD FOR THE HI-PERF 10-BIT DISPLAY INTRFC - Bulk |
| AD9981KST-80 | 制造商:Analog Devices 功能描述:HIGH PERFORMANCE 10-BIT DISPLAY INTERFACE - Bulk |
| AD9981KSTZ-80 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
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