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參數(shù)資料
| 型號： | AD9957BSVZREEL13 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, QFP48 |
| 封裝： | PLASTIC, MS-026-AED-HD, TQFP-48 |
| 文件頁數(shù)： | 22/38頁 |
| 文件大小： | 602K |
| 代理商： | AD9957BSVZREEL13 |
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AD9957
PRELIMINARY TECHNICAL DATA
Rev. PrF | Page 22 of 38
3-Wire Serial Port Read Timing—Clock Stall Low
I
7
SDIO
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
CS
I
6
I
5
I
4
I
3
I
2
I
1
I
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
Serial Port Write Timing—Clock Stall High
I
7
SDIO
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
CS
I
6
I
5
I
4
I
3
I
2
I
1
I
0
D
O7
D
O6
D
O5
D
O4
D
O3
D
O2
D
O1
D
O0
0
2-Wire Serial Port Read Timing—Clock Stall High
INSTRUCTION BYTE
The instruction byte contains the following information as shown
in the table below:
Instruction Byte Information
MSB
D6
D5
D4
D3
D2
D1
LSB
R/W
b
x
x
A4
A3
A2
A1
A0
R/-Wb—Bit 7 of the instruction byte determines whether a read or
write data transfer will occur after the instruction byte write. Logic
high indicates read operation. Logic zero indicates a write opera-
tion.
X, X—Bits 6 and 5 of the instruction byte are don’t care.
A4, A3, A2, A1, A0—Bits 4, 3, 2, 1, 0 of the instruction byte deter-
mine which register is accessed during the data transfer portion of
the communications cycle.
SERIAL INTERFACE PORT PIN DESCRIPTION
SCLK
— Serial Clock. The serial clock pin is used to synchronize
data to and from the AD9957/10 and to run the internal state ma-
chines. SCLK maximum frequency is 10 MHz.
CSB
— Chip Select Bar. Active low input that allows more than one
device on the same serial communications line. The SDO and
SDIO pins will go to a high impedance state when this input is
high. If driven high during any communications cycle, that cycle is
suspended until CS is reactivated low. Chip Select can be tied low
in systems that maintain control of SCLK.
SDIO
— Serial Data I/O. Data is always written into the
AD9957/10 on this pin. However, this pin can be used as a bi-
directional data line. Bit 7 of register address 0h controls the con-
figuration of this pin. The default is logic zero, which configures the
SDIO pin as bi-directional.
SDO
— Serial Data Out. Data is read from this pin for protocols
that use separate lines for transmitting and receiving data. In the
case where the AD9957/10 operates in a single bi-directional I/O
mode, this pin does not output data and is set to a high impedance
state.
IORESET
— Synchronizes the I/O port state machines without
affecting the addressable registers contents. An active high input on
the IORESET pin causes the current communication cycle to abort.
After IORESET returns low (Logic 0) another communication cycle
may begin, starting with the instruction byte write.
MSB/LSB TRANSFERS
The AD9957/10 serial port can support both most significant bit
(MSB) first or least significant bit (LSB) first data formats. This
functionality is controlled by the Control Function Register #1 <0>
bit. The default value of Control Function Register #1 <0> bit is low
(MSB first). When Control Function Register #1 <0> bit is set high,
the AD9957/10 serial port is in LSB first format. The instruction
byte must be written in the format indicated by Control Function
Register #1 <0> bit. That is, if the AD9957/10 is in LSB first mode,
the instruction byte must be written from least significant bit to
most significant bit.
For MSB first operation, the serial port controller will generate the
most significant byte (of the specified register) address first fol-
lowed by the next lesser significant byte addresses until the IO op-
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