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參數(shù)資料
| 型號： | AD9954 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| 中文描述： | 400 MSPS的14位，1.8伏的CMOS直接數(shù)字頻率合成 |
| 文件頁數(shù)： | 19/36頁 |
| 文件大?。?/td> | 1027K |
| 代理商： | AD9954 |
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AD9954
CFR1<22> = 1. The software controlled manual synchroniza-
tion feature is executed. The SYNC_CLK rising edge is
advanced by one SYNC_CLK cycle and this bit is cleared. To
advance the rising edge multiple times, this bit needs to be set
for each advance. See the Synchronizing Multiple AD9954s sec-
tion for details.
Rev. 0 | Page 19 of 36
CFR1<21>: Linear Frequency Sweep Enable
CFR1<21> = 0 (default). The linear frequency sweep capability
of the AD9954 is inactive.
CFR1<21> = 1, the linear frequency sweep capability of the
AD9954 is enabled. When enabled, either the rising or falling
delta frequency tuning word is applied to the frequency accu-
mulator at the programmed ramp rate, causing the output fre-
quency to ramp up or ramp down, controlled by the Profile 0
input. See the Linear Sweep Mode section for details.
CFR1<20:16>: Not Used
CFR1<15>: Linear Sweep Ramp Rate Load Control Bit
CFR1<15> = 0 (default). The linear sweep ramp rate timer is
loaded only upon timeout (timer = 1) and is not loaded due to
an I/O UPDATE input signal.
CFR1<15> = 1. The linear sweep ramp rate timer is loaded
upon timeout (timer == 1) or at the time of an I/O UPDATE
input signal.
CFR1<14>: Auto Clear Frequency Accumulator Bit
CFR1<14> = 0 (default). The current state of the frequency
accumulator remains unchanged when the delta frequency
word is changed.
CFR1<14> = 1. This bit automatically synchronously clears
(loads 0s into) the frequency accumulator for one cycle upon
reception of an I/O UPDATE signal.
CFR1<13>: Auto-Clear Phase Accumulator Bit
CFR1<13> = 0 (default), the current state of the phase accumu-
lator remains unchanged when the frequency tuning word is
applied.
CFR1<13> = 1. This bit automatically synchronously clears
(loads 0s into) the phase accumulator for one cycle upon recep-
tion of an I/O UPDATE signal.
CFR1<12>: Sine/Cosine Select Bit
CFR1<12> = 0 (default). The angle-to-amplitude conversion
logic employs a COSINE function.
CFR1<12> = 1. The angle-to-amplitude conversion logic
employs a SINE function.
CFR1<11>: Clear Frequency Accumulator
CFR1<11> = 0 (default). The frequency accumulator functions
as normal.
CFR1<11> = 1. The frequency accumulator memory elements
are cleared and held clear until this bit is cleared.
CFR1<10>: Clear Phase Accumulator
CFR1<10> = 0 (default). The phase accumulator functions as
normal.
CFR1<10> = 1. The phase accumulator memory elements are
cleared and held clear until this bit is cleared.
CFR1<9>: SDIO Input Only
CFR1<9> = 0 (default). The SDIO pin has bidirectional opera-
tion (2-wire serial programming mode).
CFR1<9> = 1. The serial data I/O pin (SDIO) is configured as
an input only pin (3-wire serial programming mode).
CFR1<8>: LSB First
CFR1<8> = 0 (default). MSB first format is active.
CFR1<8> = 1.The serial interface accepts serial data in LSB first
format.
CFR1<7>: Digital Power-Down Bit
CFR1<7> = 0 (default). All digital functions and clocks are ac-
tive.
CFR1<7> = 1. All non-IO digital functionality is suspended,
lowering the power significantly.
CFR1<6>: Comparator Power-Down Bit
CFR1<6> = 0 (default). The comparator is enabled for opera-
tion.
CFR1<6> = 1. The comparator is disabled and is in its lowest
power dissipation state.
CFR1<5>: DAC Power-Down Bit
CFR1<5> = 0 (default). The DAC is enabled for operation.
CFR1<5> = 1. The DAC is disabled and is in its lowest power
dissipation state.
CFR1<4>: Clock Input Power-Down Bit
CFR1<4> = 0 (default). The clock input circuitry is enabled for
operation.
CFR1<4> = 1. The clock input circuitry is disabled and the
device is in its lowest power dissipation state.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9954/PCB | 制造商:Analog Devices 功能描述:AD9954 400 MSPS DDS W/ 14 BIT DAC EVALBD - Bulk 制造商:Analog Devices 功能描述:EVALUATION KIT ((NS)) |
| AD9954/PCBZ | 功能描述:BOARD EVAL FOR 9954 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9954/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer |
| AD9954_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer |
| AD9954YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:400 MSPS DDS W/14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9954 TQFP48 |
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