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參數(shù)資料
| 型號： | AD9953YSVZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 0K |
| 描述： | IC DDS DAC 14BIT 1.8V 48TQFP |
| 產(chǎn)品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標準包裝： | 500 |
| 分辨率（位）： | 14 b |
| 主 fclk： | 400MHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.71 V ~ 1.96 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應商設備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
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AD9953
Rev. A | Page 23 of 32
nt of 1
he first method of loading is by changing the OSK input pin.
hen the OSK input pin changes state, the ASFR value is
aded into the ramp rate timer, which then proceeds to count
own as normal.
he second method in which the sweep ramp rate timer can be
aded before reaching a count of 1 is if the load OSK timer bit
FR1<26>) is set and an I/O UPDATE is issued.
he third method in which the sweep ramp rate timer can be
oaded before reaching a count of 1 is when going from the
active auto shaped on-off keying mode to the active auto
aped on-off keying mode; that is, when the sweep enable bit is
eing set.
OSK PIN
SYN
TO D
LE
>
OSK Ramp Rate Timer
The OSK ramp rate timer is a loadable down counter, which
generates the clock signal to the 14-bit counter that generates
the internal scale factor. The ramp rate timer is loaded with the
value of the ASFR every time the counter reaches 1 (decimal).
This load and countdown operation continues for as long as the
timer is enabled, unless the timer is forced to load before
reaching a count of 1.
If the load OSK timer bit (CFR1<26>) is set, the ramp rate
timer is loaded upon an I/O UPDATE or upon reaching a value
a cou
T
W
lo
d
T
lo
(C
T
l
in
sh
of 1. The ramp timer can be loaded before reaching
by three methods.
b
DDS CORE
OSK ENAB
CFR<25
AMPLITUDE SCALE
FACTOR REGISTER
(ASF)
LOAD OSK TIMER
CFR1<26>
C_CLK
AUTO DESK
ENABLE
CFR1<24>
AC
0
1
03374-0-005
R
RAMP RATE TIMER
CLOCK
AUTO SCALE
CTOR GENERATO
FA
01
HOLD
EC ENABLE
INC/D
OUT
COS(X)
AMPLITUDE RAMP
RATE REGISTER
(ASF)
UP/DN
DATA
LOAD
EN
f Shaped Key
Figure 20. On-Of
ing Block Diagram
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| AD9957BSVZ-REEL | IC DDS 1GSPS 14BIT IQ 100TQFP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9954 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954/PCB | 制造商:Analog Devices 功能描述:AD9954 400 MSPS DDS W/ 14 BIT DAC EVALBD - Bulk 制造商:Analog Devices 功能描述:EVALUATION KIT ((NS)) |
| AD9954/PCBZ | 功能描述:BOARD EVAL FOR 9954 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9954/PCBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer |
| AD9954_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer |
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