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參數(shù)資料
| 型號(hào)： | AD9953 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| 中文描述： | 400 MSPS的14位，1.8V CMOS的直接數(shù)字頻率合成器 |
| 文件頁數(shù)： | 25/42頁 |
| 文件大?。?/td> | 473K |
| 代理商： | AD9953 |
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PRELIMINARY TECHNICAL DATA
value. The upper 14-bits of the RAM drive the phase adder (bits <31:18>). Bits <17:0> of the
RAM output are unused when the RAM destination bit is set. The “No Dwell” bit is a don’t care in
Direct Switch Mode.
Ramp-Up Mode
Ramp-Up mode, in conjunction with the segmented RAM capability, allows up to four different
“sweep profiles” to be programmed into the AD9953. The AD9953 is programmed for Ramp-Up
mode by writing the RAM Enable bit true and programming the RAM Mode Control bits of each
profile to be used to logic 001(b). As in all modes that enable the memory, the RAM destination
bit controls whether the RAM output drives the phase accumulator or the phase offset adder.
Upon starting a sweep (via an I/O UPDATE or change in Profile bits), the RAM address generator
loads the RAM Segment Beginning Address bits of the current RSCW, driving the RAM output
from this address and the Ramp Rate Timer loads the RAM Segment Address Ramp Rate bits.
When the ramp rate timer finishes a cycle, the RAM address generator increments to the next
address, the timer reloads the ramp rate bits and begins a new countdown cycle. This sequence
continues until the RAM address generator has incremented to an address equal to the RAM
Segment Final Address bits of the current RSCW.
If the “No Dwell” bit is clear, when the RAM address generator equals the final address, the
generator stops incrementing as the terminal frequency has been reached. The sweep is complete
and does not re-start until an I/O UPDATE or change in Profile is detected to enable another sweep
from the beginning to the final RAM address as described above.
If the “No Dwell” bit is set, when the RAM address generator equals the final address, after the
next ramp rate timer cycle the phase accumulator is cleared. The phase accumulator remains
cleared until another sweep is initiated via an I/O UPDATE input or change in profile.
Notes to the Ramp-Up mode:
1) The user must insure that the beginning address is lower than the final address.
2) Changing profiles automatically terminates the current sweep and starts the next sweep.
3) The AD9953 offers no output signal indicating when a terminal frequency has been reached.
4)
Setting the RAM destination bit true such that the RAM output drives the phase-offset adder
is valid. While the above discussion describes a frequency sweep, a phase sweep operation
is also available.
Another application for Ramp-Up mode is non-symmetrical FSK modulation. With the RAM
configured for two segments, using the Profile<0> bit as the data input allows non-symmetrical
ramped FSK.
Bi-directional Ramp Mode
AD9953
REV. PrB 1/30/03
Page 25
Analog Devices, Inc.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9953ASV | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953PCB | 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9954 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9954YSV-REEL7 | 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9953/PCB | 制造商:Analog Devices 功能描述:400 MSPS, 14BIT DGTL SYNTHESIZER - Bulk |
| AD9953ASV | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953YSV | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:AD9953 400 MSPS DDS W/ 14 BIT DAC - Bulk 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9953 TQFP48 |
| AD9953YSV-REEL7 | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 400MHz 1-DAC 14-Bit Serial 48-Pin TQFP EP T/R |
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