參數(shù)資料
型號: AD9927BBCZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, BGA128
封裝: 9 X 9 MM, LEAD FREE, MO-225, CSP_BGA-128
文件頁數(shù): 40/100頁
文件大小: 784K
代理商: AD9927BBCZ
AD9927
Special Pattern Insertion
Additional flexibility is available using the SPC_PAT_EN registers,
which allows a Group B, C, or D pattern to be inserted into a series
of Group A repetitions. This feature is useful when a different
pattern is needed at the start, middle, or end of a sequence.
Rev. 0 | Page 40 of 100
Figure 47 shows an example of a sweep region using VPATA
with multiple repetitions where a single repetition of VPATB has
been added into the middle of the sequence. Figure 48 shows
more detail on how to set the registers to achieve the desired
timing.
Note that VREPB is used to specify which repetition number
has the special pattern inserted instead of VPATA. VPATB
always has priority over VPATC or VPATD if more than one
SPC_PAT_EN bit is enabled (SPC_PAT_EN [0] has priority).
VD
XV1 TO XVN
HD
REGION 1: SWEEP REGION
LINE 0
LINE 1
REGION 0
REGION 2
LINE 24
LINE 25
LINE 2
SCP1
SCP2
PATTERN B INSERTED DURING PATTERN A REPETITIONS
0
Figure 47. Example of Special Pattern Insertion
XV1
HD
V-PATTERN A
V-PATTERN B
V-PATTERN A
REP 1
REP 2
REP N
REP 5
REP 4
REP 3
REGISTER SETTINGS:
SPC_PAT_EN[0] = 1
VREPA = N
VREPB = 4
DESCRIPTION:
V-PATTERN B IS USED AS SPECIAL PATTERN
TOTAL NUMBER OF REPS USED FOR SEQUENCE (N REPS)
REP 4 USES V-PATTERN B INSTEAD OF V-PATTERN A
NOTES
1. VSTARTB MUST BE SET EQUAL TO VSTARTA.
0
Figure 48. Example of Special Pattern Insertion, Detail
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