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參數(shù)資料
| 型號(hào)： | AD9927BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, BGA128 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-225, CSP_BGA-128 |
| 文件頁(yè)數(shù)： | 22/100頁(yè) |
| 文件大?。?/td> | 784K |
| 代理商： | AD9927BBCZ |
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AD9927
Individual HBLK Patterns
The HBLK programmable timing shown in Figure 25 is similar
to CLPOB and PBLK; however, there is no start polarity control.
Only the toggle positions are used to designate the start and
stop positions of the blanking period. Additionally, there are
separate masking polarity controls for H1, H2, and HL that
designate the polarity of the horizontal clock signals during the
blanking period. Setting HBLKMASK_H1 high sets H1, and
therefore H3, H5, and H7, low during the blanking, as shown in
Figure 26. As with the CLPOB and PBLK signals, HBLK
registers are available in each V-sequence, allowing different
blanking signals to be used with different vertical timing
sequences.
Rev. 0 | Page 22 of 100
The AD9927 supports three modes of HBLK operation. HBLK
Mode 0 supports basic operation and some support for special
HBLK patterns. HBLK Mode 1 supports pixel mixing HBLK
operation. HBLK Mode 2 supports advanced HBLK operation.
The following sections describe each mode in detail. Register
parameters are described in detail in Table 11.
HBLK Mode 0 Operation
There are six toggle positions available for HBLK. Normally,
only two of the toggle positions are used to generate the
standard HBLK interval. However, the additional toggle
positions can be used to generate special HBLK patterns, as
shown in Figure 27. The pattern in this example uses all six
toggle positions to generate two extra groups of pulses during
the HBLK interval. By changing the toggle positions, different
patterns can be created.
Separate toggle positions are available for even and odd lines. If
alternation is not needed, the same values should be loaded into
the registers for even (HBLKTOGE) and odd (HBLKTOGO) lines.
HD
HBLK
BASIC HBLK PULSE IS GENERATED USING HBLKTOGE1 AND HBLKTOGE2 REGISTERS (HBLKALT = 0)
BLANK
BLANK
HBLKTOGE1
HBLKTOGE2
0
Figure 25. Typical Horizontal Blanking Pulse Placement (HBLKMODE = 0)
HD
HBLK
H1/H3/H5/H7
H1/H3/H5/H7
H2/H4/H6/H8
THE POLARITY OF H1/H3/H5/H7 DURING BLANKING IS PROGRAMMABLE
(H2/H4/H6/H8 AND HL ARE SEPARATELY PROGRAMMABLE)
0
Figure 26. HBLK Masking Polarity Control
HBLK
SPECIAL H-BLANK PATTERN IS CREATED USING MULTIPLE HBLK TOGGLE POSITIONS (HBLKALT = 0)
Figure 27. Using Multiple Toggle Positions for HBLK (HBLKMODE = 0)
H1/H3
H2/H4
HBLKTOGE1
HBLKTOGE2
HBLKTOGE3
HBLKTOGE4
HBLKTOGE5
HBLKTOGE6
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9927BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9928 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Channel 14-Bit CCD Signal Processor with V-Driver and Precision Timing Generator |
| AD9928BBCZ | 功能描述:IC CCD SIGNAL PROCESSR 128CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD9928BBCZ-60 | 制造商:Analog Devices 功能描述:- Trays |
| AD9928BBCZRL | 功能描述:IC CCD SIGNAL PROCESSR 128CSPBGA RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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