參數(shù)資料
型號: AD9913
廠商: Analog Devices, Inc.
元件分類: XO, clock
英文描述: Low Power 250 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer
中文描述: 低功耗250 MSPS的10位DAC 1.8伏CMOS直接數(shù)字頻率合成器
文件頁數(shù): 17/32頁
文件大小: 473K
代理商: AD9913
AD9913
Rev. 0 | Page 17 of 32
E0
S0
PS[0]
PS[1]
BIDIRECTIONAL MODE (EDGE TRIGGERED)
NO-DWELL BIT = x
BIDIRECTIONAL MODE (LEVEL TRIGGERED)
NO-DWELL BIT = 0
NO-DWELL BIT = 1
E0
S0
PS[0]
PS[1]
E0
S0
PS[0]
PS[1]
0
Figure 24. Display of Bidirectional Ramp Capability
Using the External Profile Pins
COMBINATION OF MODES (EDGE TRIGGERED)
E0
S0
PS[0]
PS[1]
RAMP UP
MODE
RAMP UP
MODE
BIDIRECTIONAL
MODE
RAMODE
0
Figure 25. Combination of Sweep Modes Using the External Profile Pins
Clear Functions
The AD9913 allows for a programmable continuous zeroing of
the sweep logic and the phase accumulator as well as clear-and-
release, or automatic zeroing function. Each feature is
individually controlled via bits in the control registers.
Continuous Clear Bits
The continuous clear bits are simply static control signals that
hold the respective accumulator (and associated logic) at zero
for the entire time the bit is active.
Clear-and-Release Function
The auto clear auxiliary accumulator bit, when active, clears and
releases the auxiliary accumulator upon receiving an
I/O_UPDATE or change in profile bits.
The auto clear phase accumulator, when active, clears and
releases the phase accumulator upon receiving a I/O_UPDATE
or a change in profile bits.
The automatic clearing function is repeated for every
subsequent I/O_UPDATE or change in profile bits until the
control bit is cleared.
These bits are programmed independently and do not have to
be active at the same time. For example, one accumulator may
be using the clear and release function while the other is
continuously cleared.
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