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參數(shù)資料
| 型號： | AD9910BSVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 44/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DDS 1GSPS 14BIT PAR 100TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 設(shè)計(jì)資源： | Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 分辨率（位）： | 14 b |
| 主 fclk： | 1GHz |
| 調(diào)節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 552 (CN2011-ZH PDF) |
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Data Sheet
AD9910
Rev. D | Page 49 of 64
I/O_RESET—Input/Output Reset
I/O_RESET synchronizes the I/O port state machines without
affecting the contents of the addressable registers. An active
high input on the I/O_RESET pin causes the current communica-
tion cycle to abort. After I/O_RESET returns low (Logic 0),
another communication cycle can begin, starting with the
instruction byte write.
I/O_UPDATE—Input/Output Update
The I/O_UPDATE initiates the transfer of written data from
the I/O port buffer to active registers. I/O_UPDATE is active
on the rising edge, and its pulse width must be greater than one
SYNC_CLK period. It is either an input or output pin depending
on the programming of the internal I/O update active bit.
SERIAL I/O TIMING DIAGRAMS
Figure 55 through Figure 58 provide basic examples of the timing
relationships between the various control signals of the serial
I/O port. Most of the bits in the register map are not transferred
to their internal destinations until assertion of an I/O update,
which is not included in the timing diagrams that follow.
MSB/LSB TRANSFERS
The AD9910 serial port can support both most significant bit
(MSB) first or least significant bit (LSB) first data formats. This
functionality is controlled by Bit 0 in Control Function Register 1
(0x00). The default format is MSB first. If LSB first is active, all
data, including the instruction byte, must follow LSB-first conven-
tion. Note that the highest number found in the bit range column
for each register is the MSB, and the lowest number is the LSB
for that register (see the Register Map and Bit Descriptions
section and Table 17).
I7
SDIO
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
CS
I6
I5
I4
I3
I2
I1
I0
D7
D6
D5
D4
D3
D2
D1
D0
06479-
030
Figure 55. Serial Port Write Timing, Clock Stall Low
DO7
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
DON'T CARE
I7
I6
I5
I4
I3
I2
I1
I0
SDIO
SCLK
CS
SDO
DO6
DO5
DO4
DO3
DO2
DO1
DO0
06479-
031
Figure 56. 3-Wire Serial Port Read Timing, Clock Stall Low
I7
SDIO
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
CS
I6
I5
I4
I3
I2
I1
I0
D7
D6
D5
D4
D3
D2
D1
D0
06479-
032
Figure 57. Serial Port Write Timing, Clock Stall High
I7
SDIO
INSTRUCTION CYCLE
DATA TRANSFER CYCLE
SCLK
CS
I6
I5
I4
I3
I2
I1
I0
DO7
DO6 DO5 DO4 DO3 DO2
DO1 DO0
06479-
033
Figure 58. 2-Wire Serial Port Read Timing, Clock Stall High
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9910BSVZ | 制造商:Analog Devices 功能描述:IC DDS 1GHZ TQFP-100 制造商:Analog Devices 功能描述:IC, DDS, 1GHZ, TQFP-100 |
| AD9910BSVZ-REEL | 功能描述:IC DDS 1GSPS 14BIT PAR 100TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9911 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MSPS Direct Digital Synthesizer with 10-Bit DAC |
| AD9911/PCB | 制造商:Analog Devices 功能描述:500 MSPS DIRECT DGTL SYNTHESIZER W/ 10-BIT DAC AD9911/PCB - Bulk |
| AD9911/PCBZ | 功能描述:BOARD EVAL FOR AD9911 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
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