參數(shù)資料
型號: AD9880KSTZ-100
廠商: Analog Devices Inc
文件頁數(shù): 44/64頁
文件大?。?/td> 0K
描述: IC INTERFACE/HDMI 100MHZ 100LQFP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 視頻
接口: 模擬,HDMI
電源電壓: 3.15 V ~ 3.47 V
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 管件
安裝類型: 表面貼裝
配用: AD9880/PCBZ-ND - KIT EVALUATION AD9880
AD9880
Rev. 0 | Page 49 of 64
COLOR SPACE CONVERSION
The default power up values for the color space con-
verter coefficients (R0x35 through R0x4C) are set for
ATSC RGB to YCbCr conversion. They are completely
programmable for other conversions.
0x34
1
Color space Converter Enable
This bit enables the color space converter. The power-
up default setting is 0.
Table 74. Color space Converter
Select
Result
0
Disable color space converter
1
Enable color space converter
0x35
6-5 Color space Converter Mode
These two bits set the fixed point position of the CSC
coefficients, including the A4, B4, and C4 offsets.
Table 75. CSC Fixed Point Converter Mode
Select
Result
00
±1.0, 4096 to 4095
01
±2.0, 8192 to 8190
±4.0, 16384 to 16380
0x35
4-0
ColorspaceConversionCoefficientA1MSBs
These 5 bits form the 5 MSBs of the Color space
Conversion Coefficient A1. This combined with the
8 LSBs of the following register form a 13-bit twos
complement coefficient which is user programmable.
The equation takes the form of:
ROUT = (A1 × RIN) + (A2 × GIN) + (A3 × BIN) + A4
GOUT = (B1 × RIN) + (B2 × GIN) + (B3 × BIN) + B4
BOUT = (C1 × RIN) + (C2 × GIN) + (C3 × BIN) + C4
The default value for the 13 bit A1 coefficient is
0x0C52.
0x36
7-0
ColorspaceConversionCoefficientA1LSBs
See the Register 0x35 section.
0x37
4-0
CSC A2 MSBs
These five bits form the 5 MSBs of the Color space
Conversion Coefficient A2. Combined with the 8
LSBs of the following register they form a 13 bit twos
complement coefficient that is user programmable.
The equation takes the form of:
ROUT = (A1 × RIN) + (A2 × GIN) + (A3 × BIN) + A4
GOUT = (B1 × RIN) + (B2 × GIN) + (B3 × BIN) + B4
BOUT = (C1 × RIN) + (C2 × GIN) + (C3 × BIN) + C4
The default value for the 13-bit A2 coefficient is
0x0800.
0x38
7-0
CSC A2 LSBs
See the Register 0x37 section.
0x39
4-0
CSC A3 MSBs
The default value for the 13-bit A3 is 0x0000.
0x3A
7-0
CSC A3 LSBs
0x3B
4-0
CSC A4 MSBs
The default value for the 13-bit A4 is 0x19D7.
0x3C
7-0
CSC A4 LSBs
0x3D
4-0
CSC B1 MSBs
The default value for the 13-bit B1 is 0x1C54.
0x3E
7-0
CSC B1 LSBs
0x3F
4-0
CSC B2 MSB
The default value for the 13-bit B2 is 0x0800.
0x40
7-0
CSC B2 LSBs
0x41
4-0
CSC B3 MSBs
The default value for the 13-bit B3 is 0x1E89.
0x42
7-0
CSC B3 LSBs
0x43
4-0
CSC B4 MSBs
The default value for the 13-bit B4 is 0x0291.
0x44
7-0
CSC B4 LSBs
0x45
4-0
CSC C1 MSBs
The default value for the 13-bit C1 is 0x0000.
0x46
7-0
CSC C1 LSBs
0x47
4-0
CSC C2 MSBs
The default value for the 13 bit C2 is 0x0800.
0x48
7-0
CSC C2 LSBs
0x49
4-0
CSC C3 MSBs
The default value for the 13-bit C3 is 0x0E87.
0x4A
7-0
CSC C3 LSBs
0x4B
4-0
CSC C4 MSBs
The default value for the 13-bit C4 is 0x18BD.
0x4C
7-0
CSC C4 LSBs
0x57
7
A/V Mute Override
0x57
6
A/V Mute Value
0x57
3
Disable AV Mute
0x57
2
Disable Audio Mute
0x58
7
MCLK PLL Enable
This bit enables the use of the analog PLL.
0x58
6-4
MCLK PLL_N
These bits control the division of the MCLK out of the
PLL.
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