參數(shù)資料
型號: AD9847AKST
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 1.40 MM HEIGHT, PLASTIC, MS-026BBC, LQFP-48
文件頁數(shù): 14/28頁
文件大小: 428K
代理商: AD9847AKST
REV. A
AD9847
–14–
Bit
Content
Default
Value
Address
PBLK # Bits 146
Width
Register Name
Register Description
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
[0]
[0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
1
1
1
6
6
6
6
1
6
6
6
6
1
6
6
6
6
1
6
6
6
6
0
2
6
6
2
6
6
2
6
6
2
01
00
01
3D
00
2A
06
00
2A
06
3F
3F
00
3F
3F
3F
3F
01
3F
3F
3F
3F
00
02
01
00
01
02
00
00
37
03
02
pblkdir
pblkpol
pblkspol0
pblktog1_0[5:0]
pblktog1_0[11:6]
pblkbtog2_0[5:0]
pblkbtog2_0[11:6]
pblkspol1
pblktog1_1[5:0]
pblktog1_1[11:6]
pblktog2_1[5:0]
pblktog2_1[11:6]
pblkspol2
pblktog1_2[5:0]
pblktog1_2[11:6]
pblktog2_2[5:0]
pblktog2_2[11:6]
pblkspol3
pblktog1_3[5:0]
pblktog1_3[11:6]
pblktog2_3[5:0]
pblktog2_3[11:6]
pblkscp0
pblksptr0
pblkscp1[5:0]
pblkscp1[11:6]
pblksptr1
pblkscp2[5:0]
pblkscp2[11:6]
pblksptr2
pblkscp3[5:0]
pblkscp3[11:6]
pblksptr3
PBLK Internal/External (0 = Internal, 1 = External)
PBLK External Active Polarity (0 = Low Active, 1 = High Active)
Sequence #0: Start Polarity for PBLK
Sequence #0: Toggle Position 1 for PBLK
Sequence #0: Toggle Position 2 for PBLK
Sequence #1: Start Polarity for PBLK
Sequence #1: Toggle Position 1 for PBLK
Sequence #1: Toggle Position 2 for PBLK
Sequence #2: Start Polarity for PBLK
Sequence #2: Toggle Position 1 for PBLK
Sequence #2: Toggle Position 2 for PBLK
Sequence #3: Start Polarity for PBLK
Sequence #3: Toggle Position 1 for PBLK
Sequence #3: Toggle Position 2 for PBLK
PBLK Sequence-Change-Position #0 (Hardcoded to 0)
PBLK Sequence Pointer for SCP #0
PBLK Sequence-Change-Position #1
DB
DC
DD
DE
DF
E0
E1
E2
E3
E4
[1:0]
[5:0]
[5:0]
[1:0]
[5:0]
[5:0]
[1:0]
[5:0]
[5:0]
[1:0]
PBLK Sequence Pointer for SCP #1
PBLK Sequence-Change-Position #2
PBLK Sequence Pointer for SCP #2
PBLK Sequence-Change-Position #3
PBLK Sequence Pointer for SCP #3
H1–H4, RG, SHP, SHD # Bits 53
E5
E6
E7
E8
[0]
[5:0]
[5:0]
[2:0]
1
6
6
3
00
00
20
03
h1pol
h1posloc
h1negloc
h1drv
H1/H2 Polarity Control (0 = No Inversion, 1 = Inversion)
H1 Positive Edge Location
H1 Negative Edge Location
H1 Drive Strength (0 = OFF, 1 = 3.5 mA, 2 = 7 mA,
3 = 10.5 mA, 4 = 14 mA, 5 = 17.5 mA, 6 = 21 mA, 7 = 24.5 mA)
H2 Drive Strength
H3 Drive Strength
H4 Drive Strength
RG Polarity Control (0 = No Inversion, 1 = Inversion)
RG Positive Edge Location
RG Negative Edge Location
RG Drive Strength (0 = OFF, 1 = 3.5 mA, 2 = 7 mA,
3 = 10.5 mA, 4 = 14 mA, 5 = 17.5 mA, 6 = 21 mA, 7 = 24.5 mA)
SHP (Positive) Edge Sampling Location
SHD (Positive) Edge Sampling Location
E9
EA
EB
EC
ED
EE
EF
[2:0]
[2:0]
[2:0]
[0]
[5:0]
[5:0]
[2:0]
3
3
3
1
6
6
3
03
03
03
00
00
10
02
h2drv
h3drv
h4drv
rgpol
rgposloc
rgnegloc
rgdrv
F0
F1
[5:0]
[5:0]
6
6
24
00
shpposloc
shdposloc
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