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參數(shù)資料
| 型號(hào)： | AD9806KSTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROC 10BIT 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | CCD 信號(hào)處理器，10 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
REV. 0
AD9806
–11–
APPLICATION INFORMATION
Grounding and Decoupling Recommendations
As shown in Figure 10, a single ground plane is recommended
for the AD9806. This ground plane should be as continuous as
possible, particularly around Pins 25 through 37. This will ensure
that all analog decoupling capacitors provide the lowest possible
impedance path between the power and bypass pins and their
respective ground pins. All decoupling capacitors should be
located as close as possible to the package pins. A single clean
power supply is recommended for the AD9806, but a separate
digital driver supply may be used for DRVDD (Pin 12). DRVDD
should always be decoupled to DRVSS (Pin 13), which should
be connected to the analog ground plane. The advantages of
using a separate digital driver supply include using a lower volt-
age (2.7 V) to match levels with a 2.7 V ASIC, reducing digital
power dissipation, and reducing potential noise coupling.
Using the AD9806 in AD9803 Sockets
The AD9806 may be easily used in existing AD9803 designs
without any circuit modifications. Most of the pin assignments
are the same for both ICs. Table I outlines the differences. The
circuit of Figure 10 shows the necessary connections for the
AD9806 when used in an existing AD9803 socket. If the two
auxiliary DACs are not used, then Pins 39 and 40 (DAC1 and
DAC2) may be grounded. If the AUX or ADC modes are needed,
then the input signal should be connected to either AUXIN or
ADCIN through a 0.1
F capacitor, in the same way that
CCDIN is used with the input signal.
Table I. AD9806/AD9803 Pin Differences
Pin
No.
AD9803
AD9806
Circuit Connection
1
NC
Ground
15
ACLP
NC
Ground
24
NC
Ground
25
CCDBYP2
CLPOUT
Decoupled with 0.1
F
to Ground
27
PIN
NC
Shorted to Pin 26
28
CCDBYP2
CLPREF
Decoupled with 0.1
F
to Ground
29
PGABYP1
NC
Decoupled with 0.1
F
to Ground
30
PGABYP2
NC
Shorted to Pin 29
35
AUXCONT
AUXMID
Ground, or decoupled
with 0.1
F to Ground
38
VTRBYP
NC
Decoupled with 0.1
F
to Ground
Using the AD9806 in New Designs
Figure 11 shows the recommended circuit for using the AD9806
in new designs. Three external decoupling capacitors have been
removed from the circuit shown in Figure 9, one from Pin 29,
one from Pin 38, and one from between Pins 47 and 48. Note
that the decoupling capacitors for Pins 47 (VRB) and 48 (VRT)
must be increased to 1.0
F when used in this configuration.
0.1 F
CCD
SIGNAL
INPUT
VDD
0.1 F
DIGITAL
OUTPUT
DATA
48
47
46
45
44
39 38
37
43
42
41 40
1
2
3
4
5
6
7
8
9
10
11
12
NC
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7
D8
D9 (MSB)
DRVDD
AD9806
13 14
15
16
17
18
19
20
21 22
23
24
DVDD
DVSS
NC
ADCCLK
STBY
PBLK
CLPOB
SHP
SHD
NC
VRT
VRB
SUBST
ADVSS
SDATA
ADVDD
SCK
SL
DAC2
DAC1
NC
CMLEVEL
CLPDM
DRVSS
36
35
34
33
32
31
30
29
28
27
26
25
ADCIN
AUXMID
AUXIN
ACVDD
CLPBYP
ACVSS
NC
CLPREF
NC
DIN
CLPOUT
NC = NO CONNECT
0.1 F
VDD
0.1 F
CLPDM
SHD
SHP
CLPOB
PBLK
ADCCLK
0.1 F
VOUT1
VOUT2
SDATA
SCK
SL
0.1 F
1.0 F
0.1 F
VDD
Figure 10. CCD-Mode Circuit Configuration Used in AD9803 Socket
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