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參數(shù)資料
| 型號： | AD9788BSVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 800MSPS 100TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計資源： | Powering the AD9788 Using ADP2105 for Increased Efficiency (CN0141) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | TxDAC® |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 800M |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
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AD9785/AD9787/AD9788
Rev. A | Page 30 of 64
The Auxiliary DAC 1 control register comprises two bytes located at Address 0x06. These bits are routed directly to the periphery of the
digital logic. No digital functionality within the main digital block is required.
Table 16. Auxiliary DAC 1 Control Register
Address
Bit
Name
Description
0x06
[15]
Auxiliary DAC 1 sign
0: Default. If the Auxiliary DAC 1 sign bit is cleared, the Aux DAC 1 sign is positive.
Pin 90 is the active pin.
1: If the Auxiliary DAC 1 sign bit is set, the Aux DAC 1 sign is negative. Pin 89 is the
active pin.
[14]
Auxiliary DAC 1
current direction
0: Default. If the Auxiliary DAC 1 current direction bit is cleared, the Aux DAC 1 sources
current.
1: If the Auxiliary DAC 1 current direction bit is set, the Aux DAC 1 sinks current.
[13]
Auxiliary DAC 1
power-down
0: Default. If the Auxiliary DAC 1 power-down bit is cleared, the Aux DAC 1 is active.
1: If the Auxiliary DAC 1 power-down bit is set, the Aux DAC 1 is inactive and enters a
low power state.
[12:10]
Reserved
Reserved for future use.
[9:0]
Auxiliary DAC 1 data
These bits are the Auxiliary DAC 1 gain adjustment bits.
The Q DAC control register comprises two bytes located at Address 0x07. These bits are routed directly to the periphery of the digital
logic. No digital functionality within the main digital block is required.
Table 17. Q DAC Control Register
Address
Bit
Name
Description
0x07
[15]
Q DAC sleep
0: Default. If the Q DAC sleep bit is cleared, the Q DAC is active.
1: If the Q DAC sleep bit is set, the Q DAC is inactive and enters a low power state.
[14]
Q DAC power-down
0: Default. If the Q DAC power-down bit is cleared, the Q DAC is active.
1: If the Q DAC power-down bit is set, the Q DAC is inactive and enters a low power state.
[13:10]
Reserved
Reserved for future use.
[9:0]
Q DAC gain adjustment
These bits are the Q DAC gain adjustment bits.
The Auxiliary DAC 2 control register comprises two bytes located at Address 0x08. These bits are routed directly to the periphery of the
digital logic. No digital functionality within the main digital block is required.
Table 18. Auxiliary DAC 2 Control Register
Address
Bit
Name
Description
0x08
[15]
Auxiliary DAC 2 sign
0: Default. If the Auxiliary DAC 2 sign bit is cleared, the Aux DAC 2 sign is positive.
Pin 86 is the active pin.
1: If the Auxiliary DAC 2 sign bit is set, the Aux DAC 2 sign is negative. Pin 87 is the
active pin.
[14]
Auxiliary DAC 2
current direction
0: Default. If the Auxiliary DAC 2 current direction bit is cleared, the Aux DAC 2 sources
current.
1: If the Auxiliary DAC 2 current direction bit is set, the Aux DAC 2 sinks current.
[13]
Auxiliary DAC 2
power-down
0: Default. If the Auxiliary DAC 2 power-down bit is cleared, the Aux DAC 2 is active.
1: If the Auxiliary DAC 2 power-down bit is set, the Aux DAC 2 is inactive and enters
a low power state.
[12:10]
Reserved
Reserved for future use.
[9:0]
Auxiliary DAC 2 data
These bits are the Auxiliary DAC 2 gain adjustment bits.
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| AD9788BSVZRL | 功能描述:IC DAC 16BIT 800MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD9788-DPG2-EBZ | 功能描述:BOARD EVALUATION FOR AD9788 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9788-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9788 制造商:Analog Devices 功能描述:DUAL 16B, D-A CONVERTER - Bulk 制造商:Analog Devices 功能描述:Digital to Analog Eval. Board |
| AD9788MOD-EBZ | 制造商:Analog Devices 功能描述:DUAL 12-/14-/16-BIT 800 MSPS DAC WITH LOW POWER 32-BIT COMPLEX NCO 制造商:Analog Devices 功能描述:DUAL 16B, D-A CONVERTER - Bulk |
| AD9789BBC | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14 Bit 2.5 GSPS D-A Converter RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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