參數(shù)資料
型號: AD9786BSV
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing
中文描述: PARALLEL, WORD INPUT LOADING, 16-BIT DAC, PQFP80
封裝: PLASTIC, MS-026-ADD, TQFP-80
文件頁數(shù): 39/60頁
文件大?。?/td> 1497K
代理商: AD9786BSV
AD9786
Rev. 0 | Page 39 of 60
POWER DISSIPATION
The AD9786 has seven power supply domains: two 3.3 V analog
domains (AVDD1 and AVDD2), two 2.5 V analog domains
(ADVDD and ACVDD), one 2.5 V clock domain (CLKVDD),
and two digital domains (DVDD, which runs from 2.5 V, and
DRVDD, which can run from 2.5 V or 3.3 V).
The current needed for the 3.3 V analog supplies, AVDD1 and
AVDD2, is consistent across speed and varying modes of the
AD9786.
Nominally, the current for AVDD1 is 29 mA across
all speeds and modes, while the current for AVDD2 is 20 mA.
The current for the 2.5 V analog supplies and the digital
supplies varies depending on speed and mode of operation.
Figure 67, Figure 68, and Figure 69 show this variation. Note
that CLKVDD, ADVDD, and ACVDD vary with clock speed
and interpolation rate, but not with modulation rate.
0
F
DATA
(MSPS)
250
0
25
50
75
100
125
150
175
200
225
I
0
425
400
375
350
325
300
275
250
225
200
175
150
125
100
75
50
25
2× fs/4
2× fs/8
4× fs/4
4× fs/8
8× fs/4
8× fs/8
Figure 67. DVDD Supply Current vs. Clock Speed, Interpolation, and
Modulation Rates
0
F
DATA
(MSPS)
250
0
25
50
75
100
125
150
175
200
225
I
0
60
50
40
30
20
10
Figure 68. CLKVDD Supply Current vs. Clock Speed and Interpolation Rates
0
F
DATA
(MSPS)
250
0
25
50
75
100
125
150
175
200
225
I
0
30
25
20
15
10
5
Figure 69. ADVDD and ACVDD Supply Current vs. Clock Speed and
Interpolation Rates
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