參數(shù)資料
型號： AD9739A-FMC-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 4/64頁
文件大?。?/td> 0K
描述： BOARD EVAL W/FMC CONN FPGA DEV
設(shè)計資源： AD9739A-FMC-EBZ Gerber Files
AD9739A-FMC-EBZ Layout
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC®
DAC 的數(shù)量： 1
位數(shù)： 14
采樣率（每秒）： 2.5G
數(shù)據(jù)接口： 串行，SPI?
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9739A
AD9737A/AD9739A
Data Sheet
Rev. C | Page 12 of 64
A
B
C
D
E
F
G
H
J
K
L
M
N
P
14
13
12
11
10
6
3
2
19
5
4
IRQ
CS
SCLK
RESET
SDIO
SDO
7
IO
U
T
N
8
IO
U
T
P
I120
VREF
09
616
-037
AD9739A
Figure 8. AD9739A Analog I/O and SPI Control Pins (Top View)
Table
8. AD9739A Pin Function Descriptions
Pin No.
Mnemonic
Description
C1, C2, D1, D2, E1, E2, E3, E4
VDDC
1.8 V Clock Supply Input.
A1, A2, A3, A4, A5, B1, B2, B3, B4, B5, C4,
C5, D4, D5
VSSC
Clock Supply Ground.
A10, A11, B10, B11, C10, C11, D10, D11
VDDA
3.3 V Analog Supply Input.
A12, A13, B12, B13, C12, C13, D12, D13,
VSSA
Analog Supply Ground.
A6, A9, B6, B9, C6, C9, D6, D9, E11, E12,
E13, E14, F1, F2, F3, F4, F11, F12
VSSA Shield
Analog Supply Ground Shield. Tie to VSSA at the DAC.
A14
NC
Do not connect to this pin.
A7, B7, C7, D7
IOUTN
DAC Negative Current Output Source.
A8, B8, C8, D8
IOUTP
DAC Positive Current Output Source.
B14
I120
Nominal 1.2 V Reference. Tie to analog ground via a 10 kΩ
resistor to generate a 120 μA reference current.
C14
VREF
Voltage Reference Input/Output. Decouple to VSSA with a 1 nF
capacitor.
D14
NC
Factory Test Pin. Do not connect to this pin.
C3, D3
DACCLK_N/DACCLK_P
Negative/Positive DAC Clock Input (DACCLK).
F13
IRQ
Interrupt Request Open Drain Output. Active high. Pull up to
VDD33 with a 10 kΩ resistor.
F14
RESET
Reset Input. Active high. Tie to VSS if unused.
G13
CS
Serial Port Enable Input.
G14
SDIO
Serial Port Data Input/Output.
H13
SCLK
Serial Port Clock Input.
H14
SDO
Serial Port Data Output.
J3, J4, J11, J12
VDD33
3.3 V Digital Supply Input.
G1, G2, G3, G4, G11, G12
VDD
1.8 V Digital Supply Input.
H1, H2, H3, H4, H11, H12, K3, K4, K11, K12
VSS
Digital Supply Ground.
J1, J2
NC
Differential resistor of 200 Ω exists between J1 and J2. Do not
connect to this pin.
K1, K2
NC
Differential resistor of 100 Ω exists between K1 and K2. Do not
connect to this pin.
J13, J14
DCO_P/DCO_N
Positive/Negative Data Clock Output (DCO).
K13, K14
DCI_P/DCI_N
Positive/Negative Data Clock Input (DCI).
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