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參數(shù)資料
| 型號： | AD9709-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 8-Bit, 125 MSPS Dual TxDAC D/A Converter |
| 中文描述： | 8位，125 MSPS的TxDAC系列雙D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 6/27頁 |
| 文件大?。?/td> | 466K |
| 代理商： | AD9709-EB |
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REV. 0
AD9709
–6–
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full-scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value, normalized
to full-scale, associated with a 1 LSB change in digital input code.
Monotonicity
A D/A converter is monotonic if the output either increases or
remains constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For I
OUTA
, 0 mA output is expected when
the inputs are all 0s. For I
OUTB
, 0 mA output is expected when
all inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown resulting in
nonlinear performance.
AVDD
DIGITAL
DATA
DB0-DB7
GAINCTRL
50
DVDD
DCOM
RETIMED CLOCK OUTPUT
LECROY 9210
PULSE
GENERATOR
TEKTRONIX
AWG-2021
w/OPTION 4
WRT1/
IQWRT
1.2V REF
R
SET
2
CHANNEL 1 LATCH
CHANNEL 2 LATCH
PMOS
CURRENT
SOURCE
ARRAY
PMOS
CURRENT
SOURCE
ARRAY
SEGMENTED
SWITCHES
FOR DAC1
SEGMENTED
SWITCHES FOR
DAC2
LSB
SWITCH
LSB
SWITCH
MULTIPLEXING LOGIC
AD9709
DCOM ACOM
MODE
I
OUTA1
I
OUTB1
SLEEP
CLK2/
IQRESET
CLK1/
IQCLK
5V
FSADJ1
R
SET
1
REFIO
0.1 F
FSADJ2
DB0-DB7
WRT2/
IQSEL
50
5V
MINI CIRCUITS
T1-1T
TO HP3589A
SPECTRUM/
NETWORK
ANALYZER
*AWG2021 CLOCK RETIMED SUCH THAT DIGITAL DATA TRANSITIONS
ON FALLING EDGE OF 50% DUTY CYCLE CLOCK
DVDD
DAC2
LATCH
DAC1
LATCH
CLK
DIVIDER
50
I
OUTA2
I
OUTB2
Figure 2. Basic AC Characterization Test Setup for AD9709, Testing Port 1 in Dual Port Mode, Using Independent
GAINCTRL Resistors on FSADJ1 and FSADJ2
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25
°
C) value to the value at either T
MIN
or T
MAX
. For
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per degree C. For reference drift, the drift is
reported in ppm per degree C.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied from nominal to minimum and maximum specified
voltages.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Total Harmonic Distortion
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal. It
is expressed as a percentage or in decibels (dB).
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PDF描述 |
|---|---|
| AD9712B | RES,0.0,0.25W,METAL FILM,0% |
| AD9712BAN | RES,0.0,0.25W,METAL FILM,0% |
| AD9712BAP | TEST POINT, WHITE, 0.040 HOLE, 0.062 PCB |
| AD9712BBN | POWER JACK, 250V,2 COND. FEMALE,2.1MM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9709-EBZ | 功能描述:BOARD EVAL FOR AD9709 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9709-EBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 125 MSPS, Dual TxDAC Digital-to-Analog Converter |
| AD9712 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-BIT, 100MSPS D/A CONVERTERS |
| ad97128bsq/883b | 制造商:Analog Devices 功能描述: |
| AD9712AJN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:12-Bit Digital-to-Analog Converter |
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