參數(shù)資料
型號: AD9709-EB
廠商: Analog Devices, Inc.
英文描述: 8-Bit, 125 MSPS Dual TxDAC D/A Converter
中文描述: 8位,125 MSPS的TxDAC系列雙D / A轉(zhuǎn)換
文件頁數(shù): 2/27頁
文件大?。?/td> 466K
代理商: AD9709-EB
REV. 0
–2–
AD9709–SPECIFICATIONS
DC SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
8
Bits
–0.5
–0.5
±
0.1
±
0.1
+0.5
+0.5
LSB
LSB
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Gain Match
T
A
= 25
°
C
T
MIN
to T
MAX
T
MIN
to T
MAX
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
–0.02
–2
–5
+0.02
+2
+5
% of FSR
% of FSR
% of FSR
±
0.25
±
1
–0.3
–1.6
–0.14
2.0
–1.0
±
0.1
+0.3
+1.6
+0.14
20.0
+1.25
% of FSR
% of FSR
dB
mA
V
k
pF
100
5
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
1.14
1.20
100
1.26
V
nA
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth
0.1
1.25
V
M
MHz
1
0.5
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
0
±
50
±
100
±
50
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm/
°
C
POWER SUPPLY
Supply Voltages
AVDD
DVDD
Analog Supply Current (IAVDD)
Digital Supply Current (IDVDD)
4
Digital Supply Current (IDVDD)
5
Supply Current Sleep Mode (IAVDD)
Power Dissipation
4
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
5
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
6
(5 V, I
OUTFS
= 20 mA)
Power Supply Rejection Ratio
7
—AVDD
Power Supply Rejection Ratio
7
—DVDD
3
2.7
5
5
71
5
5.5
5.5
75
7
15
12
410
450
V
V
mA
mA
mA
mA
mW
mW
mW
% of FSR/V
% of FSR/V
°
C
8
380
420
450
–0.4
–0.025
+0.4
+0.025
OPERATING RANGE
–40
+85
NOTES
1
Measured at I
, driving a virtual ground.
2
Nominal full-scale current, I
, is 32 times the I
current.
3
An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4
Measured at f
CLOCK
= 25 MSPS and f
OUT
= 1.0 MHz.
5
Measured at f
= 100 MSPS and f
= 1 MHz.
6
Measured as unbuffered voltage output with I
OUTFS
= 20 mA and 50
R
LOAD
at I
OUTA
and I
OUTB
, f
CLOCK
= 100 MSPS and f
OUT
= 40 MHz.
7
±
10% power supply variation.
Specifications subject to change without notice.
(T
MIN
to T
MAX
, AVDD = 5 V, DVDD = 5 V, I
OUTFS
= 20 mA, unless otherwise noted)
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