參數(shù)資料
型號: AD9644CCPZRL7-80
廠商: Analog Devices Inc
文件頁數(shù): 23/44頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 80MSPS 3V 48LFCSP
標準包裝: 750
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 串行,SPI?
轉換器數(shù)目: 2
功率耗散(最大): 460mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應商設備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個差分,雙極
Data Sheet
AD9644
Rev. C | Page 3 of 44
GENERAL DESCRIPTION
The AD9644 is a dual, 14-bit, analog-to-digital converter (ADC)
with a high speed serial output interface and sampling speeds
of either 80 MSPS or 155 MSPS.
The AD9644 is designed to support communications appli-
cations where high performance, combined with low cost, small
size, and versatility, is desired. The JESD204A high speed serial
interface reduces board routing requirements and lowers pin count
requirements for the receiving device.
The dual ADC core features a multistage, differential pipelined
architecture with integrated output error correction logic. Each
ADC features wide bandwidth differential sample-and-hold
analog input amplifiers that support a variety of user-selectable
input ranges. An integrated voltage reference eases design consid-
erations. A duty cycle stabilizer is provided to compensate for
variations in the ADC clock duty cycle, allowing the converters
to maintain excellent performance.
By default, the ADC output data is routed directly to the two
external JESD204A serial output ports. These outputs are at CML
voltage levels. Two modes are supported such that output coded
data is either sent through one data link or two. (L = 1; F = 4 or
L = 2; F = 2). Independent synchronization inputs (DSYNC) are
provided for each channel.
Flexible power-down options allow significant power savings,
when desired.
Programming for setup and control is accomplished using a 3-wire
SPI-compatible serial interface.
The AD9644 is available in a 48-lead LFCSP and is specified over
the industrial temperature range of 40°C to +85°C.
This product is protected by a U.S. patent.
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