- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1988 > AD9639BCPZ-170 (Analog Devices Inc)IC ADC 12B 170MSPS QUAD 72LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9639BCPZ-170 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12B 170MSPS QUAD 72LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 210M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 功率耗散（最大）： | 1.39W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 72-LFCSP |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 8 個單端，單極；4 個差分，單極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當(dāng)前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
Data Sheet
AD9639
Rev. B | Page 21 of 36
DIGITAL OUTPUTS
Serial Data Frame
The AD9639 digital output complies with the JEDEC Standard
No. 204 (JESD204), which describes a serial interface for data
converters. JESD204 uses 8B/10B encoding as well as optional
scrambling. K28.5 and K28.7 comma symbols are used for frame
synchronization. The receiver is required to lock onto the serial
data stream and recover the clock with the use of a PLL. (Refer
to IEEE Std 802.3-2002, Section 3, for a complete 8B/10B and
comma symbol description.)
The 8B/10B encoding works by taking eight bits of data (an
octet) and encoding them into a 10-bit symbol. In the AD9639,
the 12-bit converter word is broken into two octets. Bit 11
through Bit 4 are in the first octet. The second octet contains
Bit 3 through Bit 0 and four tail bits. The MSB of the tail bits can
also be used to indicate an out-of-range condition. The tail bits
are configured using the JESD204 register, Address 0x033[3].
The two resulting octets are optionally scrambled and encoded
into their corresponding 10-bit code. The scrambling function
is controlled by the JESD204 register, Address 0x033[0]. Figure 51
shows how the 12-bit data is taken from the ADC, the tail bits are
added, the two octets are scrambled, and the octets are encoded
into two 10-bit symbols. Figure 52 illustrates the data format.
The scrambler uses a self-synchronizing polynomial-based
algorithm defined by the equation 1 + x14 + x15. The descrambler
in the receiver should be a self-synchronizing version of the
scrambler polynomial. A 16-bit parallel implementation is
shown in Figure 54.
Refer to JEDEC Standard No. 204-April 2006, Section 5.1, for
complete transport layer and data format details and Section 5.2
for a complete explanation of scrambling and descrambling.
07973-
201
DATA
FROM
ADC
FRAME
ASSEMBLER
(ADD TAIL BITS)
SCRAMBLER
1 + x14 + x15
8B/10B
ENCODER
TO
RECEIVER
Figure 51. ADC Data Output Path
07973-
200
WORD 0[11:4]
SYMBOL 0[9:0]
WORD 0[3:0],TAIL BITS[3:0]
SYMBOL 1[9:0]
WORD 1[11:4]
SYMBOL 2[9:0]
WORD 1[3:0], TAIL BITS[3:0]
SYMBOL 3[9:0]
TIME
FRAME 0
FRAME 1
Figure 52. 12-Bit Data Transmission with Tail Bits
07973-
202
8B/10B
DECODER
DESCRAMBLER
1 + x14 + x15
FRAME
ALIGNMENT
DATA
OUT
FROM
TRANSMITTER
Figure 53. Required Receiver Data Path
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9640ABCPZ-125 | IC ADC 14BIT 125MSPS 64LFCSP |
| AD9641BCPZ-80 | IC ADC 14BIT SRL 80MSPS 32LFCSP |
| AD9644BCPZ-80 | IC ADC 14BIT 80MSPS 3V 48LFCSP |
| AD9648BCPZRL7-125 | IC ADC 14BIT 125MSPS 64LFCSP |
| AD9649BCPZRL7-80 | IC ADC 14BIT 80MSPS 32LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9639BCPZ-210 | 功能描述:IC ADC 12B 170MSPS QUAD 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD9639BCPZRL-170 | 功能描述:IC ADC 12B 170MSPS QUAD 72LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| AD9639BCPZRL-210 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Quad 12 Bit 210 MSPS Seria 1.8V ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| AD9640 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter |
| AD9640/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。