- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10527 > AD9600ABCPZ-125 (Analog Devices Inc)IC ADC 10BIT 125MSPS 64LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9600ABCPZ-125 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 125MSPS 64LFCSP |
| 標準包裝： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉換器數(shù)目： | 2 |
| 功率耗散（最大）： | 800mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個單端，單極；2 個差分，單極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
AD9600
Rev. B | Page 24 of 72
ADC. The output common-mode voltage of the AD8138 is
easily set with the CML pin of the AD9600 (see Figure 46), and
the driver can be configured in a Sallen-Key filter topology to
band limit the input signal.
AVDD
1V p-p
49.9
523
0.1F
R
C
499
499
499
AD8138
AD9600
VIN+
VIN–
CML
06
90
9-
01
4
Figure 46. Differential Input Configuration Using the AD8138
For baseband applications where SNR is a key parameter,
differential transformer coupling is the recommended input
configuration. An example is shown in Figure 47. The CML
voltage can be connected to the center tap of the transformer’s
secondary winding to bias the analog input.
The signal characteristics must be considered when selecting
a transformer. Most RF transformers saturate at frequencies
below a few megahertz. Excessive signal power can cause core
saturation, which leads to distortion.
2V p-p
49.9
0.1F
R
C
AD9600
VIN+
VIN–
CML
06
90
9-
0
15
Figure 47. Differential Transformer-Coupled Configuration
At input frequencies in the second Nyquist zone and above, the
noise performance of most amplifiers is not adequate to achieve
the true SNR performance of the AD9600. For applications where
SNR is a key parameter, differential double-balun coupling is
the recommended input configuration. An example is shown
in Figure 49.
An alternative to using a transformer-coupled input at
frequencies in the second Nyquist zone is to use the AD8352
differential driver. An example is shown in Figure 50. See the
AD8352 data sheet for more information.
In any configuration, the value of the shunt capacitor, C, is
dependent on the input frequency and source impedance and may
need to be reduced or removed. Table 10 lists the recommended
values to set the RC network. However, the actual values are
dependent on the input signal; therefore, Table 10 should only
be used as a starting guide.
Table 10. Example RC Network
Frequency Range (MHz)
R Series (Ω, Each)
C Differential (pF)
0 to 70
33
15
70 to 200
33
5
200 to 300
15
5
>300
15
Open
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 48
details a typical single-ended input configuration.
2V p-p
R
C
49.9
0.1F
10F
0.1F
AVDD
1k
1k
1k
1k
ADC
AD9600
AVDD
VIN+
VIN–
06
90
9-
0
18
Figure 48. Single-Ended Input Configuration
AD9600
R
0.1F
2V p-p
VIN+
VIN–
CML
C
R
0.1F
S
0.1F
25
25
S
PA
P
06
90
9-
2
28
Figure 49. Differential Double-Balun Input Configuration
AD9600
AD8352
0
R
0
CD
RD
RG
0.1F
VIN+
VIN–
CML
C
0.1F
16
1
2
3
4
5
11
R
0.1F
10
14
0.1F
8, 13
VCC
200
200
ANALOG INPUT
06
90
9-
27
0
Figure 50. Differential Input Configuration Using the AD8352
相關PDF資料 |
PDF描述 |
|---|---|
| ICL3237CAZ | IC 5DRVR/3RCVR RS232 3V 28-SSOP |
| AMIS42665TJAA1G | TRANSCEIVER CAN HS LP 8-SOIC |
| VE-J6W-MY-F2 | CONVERTER MOD DC/DC 5.5V 50W |
| ICL3243ECAZ | IC 3DRVR/5RCVR RS232 3V 28-SSOP |
| AD9054ABSTZ-135 | IC ADC 8BIT 135MSPS 44-LQFP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9600ABCPZ-150 | 功能描述:IC ADC 10BIT 150MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9600BCPZ-105 | 制造商:Analog Devices 功能描述:ADC Dual Pipelined 105Msps 10-bit Parallel/LVDS 64-Pin LFCSP EP |
| AD9600BCPZ-125 | 制造商:Analog Devices 功能描述:ADC Dual Pipelined 125Msps 10-bit Parallel/LVDS 64-Pin LFCSP EP |
| AD9600BCPZ-150 | 制造商:Analog Devices 功能描述: |
| AD9601 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 200 MSPS/250 MSPS 1.8 V Analog-to-Digital Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復。