參數(shù)資料
型號(hào): AD9552BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 12/32頁(yè)
文件大小: 0K
描述: IC PLL CLOCK GEN LP 32LFCSP
設(shè)計(jì)資源: Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘發(fā)生器
PLL: 帶旁路
輸入: CMOS,晶體
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 900MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ(5x5)
包裝: 托盤
AD9552
Data Sheet
Rev. E | Page 2 of 32
TABLE OF CONTENTS
REVISION HISTORY
11/12—Rev. D to Rev. E
Changes to Figure 2...........................................................................8
Changes to Serial Control Port Section........................................20
Changes to Table 17.........................................................................24
Changes to Table 18.........................................................................25
Updated Outline Dimensions (Changed CP-32-2 to CP-32-7)...... 31
Changes to Ordering Guide ...........................................................31
7/11—Rev. C to Rev. D
Changes to Table 1, Reference Clock Input Characteristics,
Input High Voltage and Input Low Voltage Parameter Values... 4
Changes to Table 8, Added Endnote for Pin 9 and Pin 10.......... 8
Changes to Part Initialization Automatic Power-On Reset
Section, Second Paragraph............................................................ 17
Changes to Thermal Performance Section , First Paragraph ... 19
Changes to Serial Port Control Section, First Paragraph.......... 20
Changes to Table 20, Added Endnote to Bit 2 Description ...... 27
Updated Outline Dimensions....................................................... 31
7/10—Rev. B to Rev. C
Changed Crystal Load Capacitance to 15 pF............. Throughout
Added Conditions Statement to Specifications Section, Supply
Voltage Specifications, and Input Voltage Specifications............ 3
Reformatted Specifications Section (Renumbered Sequentially)..... 3
Added Input/Output Termination Recommendations Section,
Figure 17, and Figure 18 (Renumbered Sequentially)............... 13
Moved Preset Frequency Ratios Section ..................................... 13
Changes to Component Blocks Section ...................................... 15
Added Part Initialization and Automatic Power-On
Reset Section ................................................................................... 17
4/10—Rev. A to Rev. B
Changes to Preset Frequency Ratios Section.............................. 12
Moved Table 15 and Changes to Table 15................................... 13
Changes to Figure 17...................................................................... 14
Changes to PLL Section, Output Dividers Section, and
Input-to-OUT2 Option Section ............................................... 15
Changes to Output/Input Frequency Relationship Section...... 16
Changes to Table 22 ....................................................................... 23
Changes to Table 26 ....................................................................... 26
9/09—Rev. 0 to Rev. A
Changes to Table 4.............................................................................3
Changes to Table 5.............................................................................4
Added Table 6; Renumbered Sequentially .....................................4
Changes to Figure 5...........................................................................9
Changes to PLL Section................................................................. 14
Changes to Table 22 ....................................................................... 21
Changes to Table 25 ....................................................................... 24
7/09—Revision 0: Initial Version
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