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參數(shù)資料
| 型號： | AD9552BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL CLOCK GEN LP 32LFCSP |
| 設(shè)計資源： | Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 帶旁路 |
| 輸入： | CMOS，晶體 |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 900MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 托盤 |
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Oscillator Frequency Upconverter
Data Sheet
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2009–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Converts a low frequency input reference signal to a high
frequency output signal
Input frequencies from 6.6 MHz to 112.5 MHz
Output frequencies up to 900 MHz
Preset pin programmable frequency translation ratios
Arbitrary frequency translation ratios via SPI port
On-chip VCO
Accepts a crystal resonator and/or an external oscillator
as a reference frequency source
Secondary output (either integer-related to the primary
output or a copy of the reference input)
RMS jitter: <0.5 ps
SPI-compatible, 3-wire programming interface
Single supply (3.3 V)
Very low power: <400 mW (under most conditions)
Small package size (5 mm × 5 mm)
APPLICATIONS
Cost effective replacement of high frequency VCXO, OCXO,
and SAW resonators
Extremely flexible frequency translation with low jitter for
SONET/SDH (including FEC), 10 Gb Ethernet, Fibre
Channel, and DRFI/DOCSIS
High-definition video frequency translation
Wireless infrastructure
Test and measurement (including handheld devices)
GENERAL DESCRIPTION
The AD9552 is a fractional-N phase locked loop (PLL) based
clock generator designed specifically to replace high frequency
crystal oscillators and resonators. The device employs a sigma-
delta (Σ-Δ) modulator (SDM) to accommodate fractional
frequency synthesis. The user supplies an input reference signal
by connecting a single-ended clock signal directly to the REF
pin or by connecting a crystal resonator across the XTAL pins.
The AD9552 is pin programmable, providing one of 64 standard
output frequencies based on one of eight common input
frequencies. The device also has a 3-wire SPI interface, enabling
the user to program custom input-to-output frequency ratios.
The AD9552 relies on an external capacitor to complete the loop
filter of the PLL. The output is compatible with LVPECL, LVDS,
or single-ended CMOS logic levels, although the AD9552 is
implemented in a strictly CMOS process.
The AD9552 is specified to operate over the extended industrial
temperature range of 40°C to +85°C.
BASIC BLOCK DIAGRAM
PLL
OUTPUT
CIRCUITRY
INPUT
FREQUENCY
SOURCE
SELECTOR
REF
XTAL
OUT2
OUT1
PIN-DEFINED AND SERIAL PROGRAMMING
AD9552
07
80
6-
00
1
Figure 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9552BCPZ | 制造商:Analog Devices 功能描述:IC PLL CLOCK GENERATOR 112.5MHZ LFCSP-32 |
| AD9552BCPZ-REEL7 | 功能描述:IC PLL CLOCK GEN LP 32LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| AD9552PCBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Oscillator Frequency Upconverter |
| AD9553 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Flexible Clock Translator for GPON, Base Station, SONET/SDH, T1/E1, and Ethernet |
| AD9553/PCBZ | 功能描述:BOARD EVAL FOR AD9553 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
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