參數(shù)資料
型號(hào): AD9547BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 73/104頁
文件大小: 0K
描述: IC CLOCK GEN/SYNCHRONIZR 64LFCSP
產(chǎn)品變化通告: AD9547 Mask Change 20/Oct/2010
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘/頻率發(fā)生器,同步器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 750kHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
AD9547
Data Sheet
Rev. E | Page 70 of 104
Table 47. Nominal System Clock (SYSCLK) Period1
Address
Bit
Bit Name
Description
0x0103
[7:0]
Nominal SYSCLK period
(expressedin fs)
System clock period, Bits[7:0].
0x0104
[7:0]
System clock period, Bits[15:8].
0x0105
[7:5]
Unused
Unused.
[4:0]
Nominal SYSCLK period
System clock period, Bits[20:16].
1
Units are femtoseconds (fs).The default value is 0x0F424 = 1,000,000(1 ns) and implies a system clockfrequency of 1 GHz.
Table 48. System Clock Stability Period1
Address
Bit
Bit Name
Description
0x0106
[7:0]
SYSCLK stability period
(expressedin ms)
System clock stability period, Bits[7:0] (default = 0x01).
0x0107
[7:0]
System clock stability period, Bits[15:8] (default = 0x00).
0x0108
[7:4]
Unused
Unused.
[3:0]
SYSCLK stability period
System clock stability period, Bits[19:16] (default = 0x0)
(default period= 0x00001, or 1 ms).
1
Units are milliseconds (ms). The default value is 0x00001 = 1 (1ms).
GENERAL CONFIGURATION (REGISTER 0x0200 TO REGISTER 0x0214)
Register0x0200 to Register0x0207—Multifunction PinControl(M0to M7)
Table 49. Multifunction Pin(M0 to M7) Control1
Address
Bit
Bit Name
Description
0x0200
7
M0 in/out
In/out control for the M0 pin.
0 (default) = input (control pin).
1 = output (status pin).
[6:0]
M0 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0201
7
M1 in/out
In/out control for the M1 pin (same as M0).
[6:0]
M1 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0202
7
M2 in/out
In/out control for the M2 pin (same as M0).
[6:0]
M2 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0203
7
M3 in/out
In/out control for the M3 pin (same as M0).
[6:0]
M3 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0204
7
M4 in/out
In/out control for the M4 pin (same as M0).
[6:0]
M4 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0205
7
M5 in/out
In/out control for the M5 pin (same as M0).
[6:0]
M5 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0206
7
M6 in/out
In/out control for the M6 pin (same as M0).
[6:0]
M6 function
See Table 25 and Table 26 (default = 0xb0000000).
0x0207
7
M7 in/out
In/out control for the M7 pin (same as M0).
[6:0]
M7 function
See Table 25 and Table 26 (default = 0xb0000000).
1
The default setting for all the multifunction pins is as an unused control input pin.
Table 50. IRQ PinOutput Mode
Address
Bit
Bit Name
Description
0x0208
[7:2]
Unused
Unused.
[1:0]
IRQ pin output mode
Select the output mode of the IRQ pin.
00 (default) = NMOS, opendrain (requires an external pull-up resistor).
01 = PMOS, opendrain (requires an external pull-down resistor).
10 = CMOS, active high.
11 = CMOS, active low.
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