參數(shù)資料
型號： AD9520-5/PCBZ
廠商： Analog Devices Inc
文件頁數(shù)： 53/76頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9520-5
設計資源： Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
Phase Coherent FSK Modulator (CN0186)
AD9520 Eval Brd Schematic
AD9520 BOM
標準包裝： 1
主要目的： 計時，時鐘發(fā)生器
已用 IC / 零件： AD9520-5
已供物品： 板
Data Sheet
AD9520-5
Rev. A | Page 57 of 76
Addr.
(Hex)
Parameter
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
VCO Divider and CLK Input
0x1E0
VCO divider
Unused
VCO divider
0x00
0x1E1
Input CLKs
Unused
(default = 01b)
Power
down
clock input
section
Unused
Bypass
VCO divider
0x20
0x1E2
to
0x22A
Unused
0x00
System
0x230
Power-down
and SYNC
Unused
Disable
power-on
SYNC
Power
down
SYNC
Power
down
distribution
reference
Soft SYNC
0x00
0x231
Unused
0x00
Update All Registers
0x232
IO_UPDATE
Unused
IO_UPDATE
(self-clearing)
0x00
0x233
to
0x9FF
Unused
0x00
EEPROM Buffer Segment
0xA00
Serial port
configuration
Data transfer: one byte
0x00
0xA01
Starting address: Address 0x000
0x00
0xA02
0x00
0xA03
EEPROM
customer
version ID
Data transfer: three bytes
0x02
0xA04
Starting address: Address 0x004
0x00
0xA05
0x04
0xA06
PLL settings
Data transfer: 16 bytes
0x0E
0xA07
Starting address: Address 0x010
0x00
0xA08
0x10
0xA09
Output driver
control
Data transfer: 16 bytes
0x0E
0xA0A
Starting address: Address 0x0F0
0x00
0xA0B
0xF0
0xA0C
LVPECL channel
dividers
Data transfer: 12 bytes
0x0B
0xA0D
Starting address: Address 0x190
0x01
0xA0E
0x90
0xA0F
VCO divider and
CLK input
Data transfer: two bytes
0x01
0xA10
Starting address: Address 0x1E0
0x01
0xA11
0xE0
0xA12
Power-down
and SYNC
Data transfer: two bytes
0x01
0xA13
Starting address: Address 0x230
0x02
0xA14
0x30
0xA15
I/O update
Action: IO_UPDATE
0x80
0xA16
End of data
Action: end of data
0xFF
0xA17
to
0xAFF
Unused
(available for additional EEPROM instructions)
0x00
EEPROM Control
0xB00
EEPROM
status
(read only)
Unused
STATUS_
EEPROM
0x00
0xB01
EEPROM error
checking
(read only)
Unused
EEPROM
data error
0x00
0xB02
EEPROM
Control 1
Unused
SOFT_EEPROM
(self-clearing)
Enable
EEPROM write
0x00
0xB03
EEPROM
Control 2
Unused
REG2EEPROM
(self-clearing)
0x00
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