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| 型號： | AD9287-100EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION AD9287 |
| 設(shè)計資源： | AD9219/28/59/87 Gerber Files |
| 標準包裝： | 1 |
| ADC 的數(shù)量： | 4 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 100M |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 2 Vpp |
| 在以下條件下的電源（標準）： | 530mW @ 100MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9287 |
| 已供物品： | 板，電源 |
| 產(chǎn)品目錄頁面： | 780 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | AD9287BCPZRL7-100DKR-ND - IC ADC 8BIT QUAD 100MSPS 48LFCSP AD9287BCPZRL7-100CT-ND - IC ADC 8BIT QUAD 100MSPS 48LFCSP |
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Quad, 8-Bit, 100 MSPS,
Serial LVDS 1.8 V ADC
Data Sheet
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006–2011 Analog Devices, Inc. All rights reserved.
FEATURES
4 ADCs integrated into 1 package
133 mW ADC power per channel at 100 MSPS
SNR = 49 dB (to Nyquist)
ENOB = 7.85 bits
SFDR = 65 dBc (to Nyquist)
Excellent linearity
DNL = ±0.2 LSB (typical)
INL = ±0.2 LSB (typical)
Serial LVDS (ANSI-644, default)
Low power, reduced signal option (similar to IEEE 1596.3)
Data and frame clock outputs
295 MHz full-power analog bandwidth
2 V p-p input voltage range
1.8 V supply operation
Serial port control
Full-chip and individual-channel power-down modes
Flexible bit orientation
Built-in and custom digital test pattern generation
Programmable clock and data alignment
Programmable output resolution
Standby mode
APPLICATIONS
Medical imaging and nondestructive ultrasound
Portable ultrasound and digital beam-forming systems
Quadrature radio receivers
Diversity radio receivers
Tape drives
Optical networking
Test equipment
GENERAL DESCRIPTION
The AD9287 is a quad, 8-bit, 100 MSPS analog-to-digital con-
verter (ADC) with an on-chip sample-and-hold circuit designed
for low cost, low power, small size, and ease of use. The product
operates at a conversion rate of up to 100 MSPS and is optimized
for outstanding dynamic performance and low power in
applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/
CMOS-/LVDS-compatible sample rate clock for full performance
operation. No external reference or driver components are
required for many applications.
The ADC automatically multiplies the sample rate clock for the
appropriate LVDS serial data rate. A data clock output (DCO) for
FUNCTIONAL BLOCK DIAGRAM
SERIAL
LVDS
REF
SELECT
+–
AD9287
AGND
VIN – A
VIN + A
VIN – B
VIN + B
VIN – D
VIN + D
VIN – C
VIN + C
SENSE
VREF
AVDD
DRVDD
8
PDWN
REFT
REFB
D – A
D + A
D – B
D + B
D – D
D + D
D – C
D + C
FCO–
FCO+
DCO+
DCO–
CLK+
DRGND
CLK–
SERIAL PORT
INTERFACE
CSB
SCLK/DTP
SDIO/ODM
RBIAS
SERIAL
LVDS
SERIAL
LVDS
SERIAL
LVDS
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
DATA RATE
MULTIPLIER
0.5V
059
66-
00
1
T/H
Figure 1.
capturing data on the output and a frame clock output (FCO)
for signaling a new output byte are provided. Individual-channel
power-down is supported and typically consumes less than
2 mW when all channels are disabled.
The ADC contains several features designed to maximize
flexibility and minimize system cost, such as programmable
clock and data alignment and programmable digital test pattern
generation. The available digital test patterns include built-in
deterministic and pseudorandom patterns, along with custom user-
defined test patterns entered via the serial port interface (SPI).
The AD9287 is available in an RoHS compliant, 48-lead LFCSP. It is
specified over the industrial temperature range of 40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
Small Footprint. Four ADCs are contained in a small, space-
saving package.
2.
Low power of 133 mW/channel at 100 MSPS.
3.
Ease of Use. A data clock output (DCO) is provided that
operates at frequencies of up to 400 MHz and supports
double data rate (DDR) operation.
4.
User Flexibility. The SPI control offers a wide range of flexible
features to meet specific system requirements.
5.
Pin-Compatible Family. This includes the AD9219 (10-bit),
AD9228 (12-bit), and AD9259 (14-bit).
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