參數(shù)資料
型號(hào)： AD9262BCPZRL7-5
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/32頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT 5MHZ 64LFCSP
設(shè)計(jì)資源： Interfacing ADL5382 to AD9262 as an RF-to-Bits Solution (CN0062)
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 16
采樣率（每秒）： 160M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 703mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 2 個(gè)單端，雙極；1 個(gè)差分，單極
16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to
160 MSPS Dual Continuous Time Sigma-Delta ADC
AD9262
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2010 Analog Devices, Inc. All rights reserved.
FEATURES
SNR: 83 dB (85 dBFS) to 10 MHz input
SFDR: 87 dBc to 10 MHz input
Noise figure: 15 dB
Input impedance: 1 kΩ
Power: 600 mW
1.8 V analog supply operation
1.8 V to 3.3 V output supply
Selectable bandwidth
2.5 MHz/5 MHz/10 MHz real
5 MHz/10 MHz/20 MHz complex
Output data rate: 30 MSPS to 160 MSPS
Integrated dc and quadrature correction
Integrated decimation filters
Integrated sample rate converter
On-chip PLL clock multiplier
On-chip voltage reference
Offset binary, Gray code, or twos complement data format
Serial control interface (SPI)
APPLICATIONS
Baseband quadrature receivers: CDMA2000, W-CDMA,
multicarrier GSM/EDGE, 802.16x, and LTE
Quadrature sampling instrumentation
Medical equipment
Radio detection and ranging (RADAR)
GENERAL DESCRIPTION
The AD9262 is a dual channel, 16-bit analog-to-digital conver-
ter (ADC) based on a continuous time (CT) sigma-delta (Σ-Δ)
architecture that achieves 87 dBc of dynamic range over a
10 MHz input bandwidth. The integrated features and characteris-
tics unique to the continuous time Σ-Δ architecture significantly
simplify its use and minimize the need for external components.
The AD9262 has a resistive input impedance that relaxes the
requirements of the driver amplifier. In addition, a 32× oversam-
pled fifth-order continuous time loop filter significantly attenuates
out-of-band signals and aliases, reducing the need for external
filters at the input.
An external clock input or the integrated integer-N PLL provides
the 640 MHz internal clock needed for the oversampled conti-
nuous time Σ-Δ modulator. On-chip decimation filters and sample
rate converters reduce the modulator data rate from 640 MSPS to a
user-defined output data rate between 30 MSPS and 160 MSPS,
enabling a more efficient and direct interface.
FUNCTIONAL BLOCK DIAGRAM
07772-001
CT Σ-Δ
MODULATOR
LOW-PASS
DECIMATION
FILTER
VIN+A
AGND
SAMPLE
RATE
CONVERTER
CMOS
BUFFER
DGND
AD9262
DRVDD
AVDD
ORA
PHASE-
LOCKED
LOOP
SDIO SCLK
SERIAL
INTERFACE
CSB
QUADRATURE
ERROR
ESTIMATE
GAIN
ADJ
PHASE
ADJ
DC
CORRECT
DC
CORRECT
D15A
D0A
DCO
D15B
D0B
ORB
VIN–A
VREF
CFILT
VIN–B
VIN+B
CLK+
CLK–
CT Σ-Δ
MODULATOR
LOW-PASS
DECIMATION
FILTER
SAMPLE
RATE
CONVERTER
CMOS
BUFFER
Figure 1
The AD9262 incorporates an integrated dc correction and
quadrature estimation block that corrects for gain and phase
mismatch between the two channels. This functional block
proves invaluable in complex signal processing applications
such as direct conversion receivers.
The digital output data is presented in offset binary, Gray code,
or twos complement format. A data clock output (DCO) is
provided to ensure proper timing with the receiving logic. The
AD9262 has the added feature of interleaving Channel A and
Channel B data onto one 16-bit bus, simplifying on-board routing.
The ADC is available in three different bandwidth options of
2.5 MHz, 5 MHz, and 10 MHz, and operates on a 1.8 V analog
supply and a 1.8 V to 3.3 V digital supply, consuming 600 mW.
The AD9262 is available in a 64-lead LFCSP and is specified
over the industrial temperature range (40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
Continuous time Σ-Δ architecture efficiently achieves high
dynamic range and wide bandwidth.
2.
Passive input structure reduces or eliminates the require-
ments for a driver amplifier.
3.
An oversampling ratio of 32× and high order loop filter
provide excellent alias rejection reducing or eliminating the
need for antialiasing filters.
4.
An integrated decimation filter, sample rate converter, PLL
clock multiplier, and voltage reference provide ease of use.
5.
Integrated dc correction and quadrature error correction.
6.
Operates from a single 1.8 V analog power supply and
1.8 V to 3.3 V output supply.
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AD9262-EBZ 制造商:Analog Devices 功能描述:Evaluation Board For AD9262BCPZ 制造商:Analog Devices 功能描述:16 BIT DUAL BANDWIDTH ADC EB - Boxed Product (Development Kits) 制造商:Analog Devices 功能描述:A/D Converter Eval. Board 制造商:Analog Devices 功能描述:A/D Converter Eval. Board; Silicon Manufacturer:Analog Devices; Silicon Core Number:AD9262; Kit Application Type:Data Converter; Application Sub Type:ADC; Kit Contents:Software, Evaluation Board
AD9265 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:16-Bit, 125 MSPS/105 MSPS/80 MSPS 1.8 V Analog-to-Digital Converter
AD9265-105EBZ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 16 Bit 105 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
AD9265-125EBZ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 16 Bit 125 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
AD9265-80EBZ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 16 Bit 80 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V
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