參數(shù)資料
型號(hào)： AD8120ACPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/16頁(yè)
文件大?。?/td> 0K
描述： IC ANLG VIDEO DELAY LINE 32LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類型： 視頻延遲線
應(yīng)用： HD 視頻
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-EP（5x5）
包裝： 帶卷 (TR)
AD8120
Data Sheet
Rev. A | Page 4 of 16
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
DIGITAL CONTROL INPUT CHARACTERISTICS
(SEE BELOW FOR POWER DOWN)
SDO/SDA, SCK/SCL, SDI/A1, CS/A0, SER_SEL,
MODE
Input Bias Current
2
μA
Input High Voltage
2.6
V
Input Low Voltage
0.6
V
Output High Voltage
4.5
V
Output Low Voltage
0.6
V
POWER DOWN CHARACTERISTICS
PD
Input High Voltage
4.0
V
Input Low Voltage
0.6
V
SPI TIMING CHARACTERISTICS
Clock Frequency
SCK
10
MHz
CS Setup Time, t1
CS to SCK
5
ns
Clock Pulse High, t2
SCK
50
ns
Clock Pulse Low, t3
SCK
50
ns
Data Setup Time, t4
SDI to SCK
5
ns
Data Hold Time, t5
SDI to SCK
5
ns
CS Hold Time, t6
SCK to CS
5
ns
I2C TIMING CHARACTERISTICS
Clock Frequency
SCL
100
kHz
Start Setup Time, t1
SDA to SCL
10
ns
Clock Pulse High, t2
SCL
5
μs
Clock Pulse Low, t3
SCL
5
μs
Data Setup Time, t4
SDA (input) to SCL
100
ns
Data Hold Time, t5
SDA (input) to SCL
100
ns
Hold Time, t6
SCL to SDA
10
ns
POWER SUPPLY
Positive Supply Range
4.5
5.5
V
Negative Supply Range
5.5
4.5
V
Positive Quiescent Current
Delay = 0 ns
44
mA
Delay = 50 ns
114
mA
Powered down, PD low
4
mA
Negative Quiescent Current
Delay = 0 ns
37
mA
Delay = 50 ns
108
mA
Powered down, PD low
0.5
mA
Quiescent Current Drift
TMIN to TMAX, delay = 0 ns
0.13
mA/°C
TMIN to TMAX, delay = 50 ns
0.36
mA/°C
+PSRR
RL = 150 , delay = 50 ns
56
dB
PSRR
RL = 150 , delay = 50 ns
44
dB
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