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參數(shù)資料
| 型號(hào)： | AD7839ASZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 13BIT OCT VOLT OUT 44MQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 設(shè)置時(shí)間： | 30µs |
| 位數(shù)： | 13 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 303mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類(lèi)型： | 8 電壓，單極；8 電壓，雙極 |
| 采樣率（每秒）： | 33k |
| 配用： | EVAL-AD7839EBZ-ND - BOARD EVAL FOR AD7839 |
–3–
REV. 0
AD7839
(These characteristics are included for Design Guidance and are not subject
to production testing.)
AC PERFORMANCE CHARACTERISTICS
Parameter
A
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
30
s typ
Full-Scale Change to
±1/2 LSB. DAC Latch Contents Alternately
40
s max
Loaded with All 0s and All 1s
Slew Rate
0.7
V/
s typ
Digital-to-Analog Glitch Impulse
230
nV-s typ
Measured with VREF(+) = +5 V, VREF(–) = –5 V. DAC Latch
Alternately Loaded with 0FFF Hex and 1000 Hex. Not Dependent
on Load Conditions
Channel-to-Channel Isolation
99
dB typ
See Terminology
DAC-to-DAC Crosstalk
40
nV-s typ
See Terminology
Digital Crosstalk
0.2
nV-s typ
Feedthrough to DAC Output Under Test Due to Change in Digital
Input Code to Another Converter
Digital Feedthrough
0.1
nV-s typ
Effect of Input Bus Activity on DAC Output Under Test
Output Noise Spectral Density
@ 1 kHz
200
nV/
√Hz typ
All 1s Loaded to DAC. VREF(+) = VREF(–) = 0 V
Specifications subject to change without notice.
TIMING SPECIFICATIONS1, 2
Parameter
Limit at TMIN, TMAX
Units
Description
t1
15
ns min
Address to
WR Setup Time
t2
0
ns min
Address to
WR Hold Time
t3
50
ns min
CS Pulsewidth Low
t4
50
ns min
WR Pulsewidth Low
t5
0
ns min
CS to WR Setup Time
t6
0
ns min
WR to CS Hold Time
t7
20
ns min
Data Setup Time
t8
0
ns min
Data Hold Time
t9
30
s typ
Settling Time
t10
300
ns max
CLR Pulse Activation Time
t11
50
ns min
LDAC Pulsewidth Low
NOTES
1All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2Rise and fall times should be no longer than 50 ns.
Specifications subject to change without notice.
t1
t2
t5
t6
t3
t4
t7
t8
t9
t10
LDAC
CLR
WR
CS
A0, A1, A2
DATA
VOUT
t11
Figure 1. Timing Diagram
(VCC = +5 V
5%; VDD = +15 V
5%; VSS = –15 V
5%; GND = DUTGND = 0 V)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD783AN | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sample/Track-and-Hold Amplifier |
| AD783AQ | 制造商:ANA 功能描述:783 45 PER TUBE S10L2A |
| AD783AR | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Complete Very High Speed Sample-and-Hold Amplifier |
| AD783JN | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Sample/Track-and-Hold Amplifier |
| AD783JQ | 功能描述:IC AMP SAMPLE HOLD LP 5MA 8CDIP RoHS:否 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:Excalibur™ 放大器類(lèi)型:J-FET 電路數(shù):1 輸出類(lèi)型:- 轉(zhuǎn)換速率:45 V/µs 增益帶寬積:10MHz -3db帶寬:- 電流 - 輸入偏壓:20pA 電壓 - 輸入偏移:490µV 電流 - 電源:1.7mA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 38 V，±2.25 V ~ 19 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR) |
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