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參數(shù)資料
| 型號： | AD7824 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | High Speed 4-Channel 8-Bit ADC(四通道LC2MOS高速8位A/D轉(zhuǎn)換器) |
| 中文描述： | 高速4通道8位ADC（四通道LC2MOS高速8位的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 273K |
| 代理商： | AD7824 |
AD7824/AD7828
REV. C
–7–
INPUT CURRE NT
Due to the novel conversion techniques employed by the AD7824/
AD7828, the analog input behaves somewhat differently than in
conventional devices. T he ADC’s sampled-data comparators
take varying amounts of input current depending on which cycle
the conversion is in.
T he equivalent input circuit of the AD7824/AD7828 is shown
in Figure 8. When a conversion starts (
CS
and
RD
going low),
all input switches close, and the selected input channel is con-
nected to the most significant and least significant comparators.
T herefore, the analog input is connected to thirty-one 1 pF
input capacitors at the same time.
Figure 8. AD7824/AD7828 Equivalent Input Circuit
T he input capacitors must charge to the input voltage through
the on resistance of the analog switches (about 3k to 6k). In ad-
dition, about 14 pF of input stray capacitance must be charged.
T he analog input for any channel can be modelled as an RC
network as shown in Figure 9. As R
S
increases, it takes longer
for the input capacitance to charge.
Figure 9. RC Network Model
T he time for which the input comparators track the analog input
is approximately 1
μ
s at the start of conversion. Because of input
transients on the analog inputs, it is recommended that a source
impedance of not greater than 100 ohms be connected to the
analog inputs. T he output impedance of an op amp is equal to
the open loop output impedance divided by the loop gain at the
frequency of interest. It is important that the amplifier driving
the AD7824/AD7828 analog inputs have sufficient loop gain at the
input signal frequency as to make the output impedance low.
Suitable op amps for driving the AD7824/AD7828 are the
AD544 or AD644.
INHE RE NT SAMPLE -HOLD
A major benefit of the AD7824’s and AD7828’s analog input
structure is its ability to measure a variety of high-speed signals
without the help of an external sample-and-hold. In a conven-
tional SAR type converter, regardless of its speed, the input
must remain stable to at least 1/2 LSB throughout the conver-
sion process if rated accuracy is to be maintained. Conse-
quently, for many high-speed signals, this signal must be
externally sampled and held stationary during the conversion.
T he AD7824/AD7828 input comparators, by nature of their
input switching inherently accomplish this sample-and-hold
function. Although the conversion time for AD7824/AD7828
is 2
μ
s, the time for which any selected analog input must be
1/2 LSB stable is much smaller. T he AD7824/AD7828 tracks
the selected input channel for approximately 1
μ
s after conver-
sion start. T he value of the analog input at that instant (1
μ
s
from conversion start) is the measured value. T his value is then
used in the least significant flash to generate the lower 4-bits of
data.
SINUSOIDAL INPUT S
T he AD7824/AD7828 can measure input signals with slew rates
as high as 157 mV/
μ
s to the rated specifications. T his means
that the analog input frequency can be up to 10 kHz without the
aid of an external sample and hold. Furthermore, the AD7828
can measure eight 10 kHz signals without a sample and hold.
T he Nyquist criterion requires that the sampling rate be twice
the input frequency (i.e., 2
×
10 kHz). T his requires an ideal
antialiasing filter with an infinite roll-off. T o ease the problem of
antialiasing filter design, the sampling rate is usually much
greater than the Nyquist criterion. T he maximum sampling rate
(F
MAX
) for the AD7824/AD7828 can be calculated as follows:
F
MAX
=
1
t
CRD
+
t
P
F
MAX
=
t
CRD
= AD7824/AD7828 Conversion T ime
t
P
= Minimum Delay Between Conversion
T his permits a maximum sampling rate of 50 kHz for each of
the 8 channels when using the AD7828 and 100 kHz for each of
the 4 channels when using the AD7824.
1
2
E
±6
+
0.5
E
±6
= 400 kHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7824BCHIPS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| AD7824BQ | 功能描述:IC ADC 8BIT LC2MOS 4CH HS 24CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7824BQ/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| AD7824CQ | 功能描述:IC ADC 8BIT LC2MOS 4CH HS 24CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7824CQ/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
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