參數資料
型號: AD7799
廠商: Analog Devices, Inc.
英文描述: Low Power, 24-Bit/16-Bit Sigma-Delta ADC with In-Amp
中文描述: 低功耗,24-Bit/16-BitΣ-Δ型ADC在放大器
文件頁數: 16/17頁
文件大?。?/td> 499K
代理商: AD7799
AD7798/AD7799
Preliminary Technical Information
Bit Location
REV. PrD. Page 16 of 17
Bit Name
Description
0
0
1
1
1
1
These bits must be programmed to a logic 0 for correct operation.
Enables the Reference Detect Function.
When
set
, the NOREF bit in the status register indicates when the reference being used by the
ADC is not present.
When
cleared
, the reference detect function is disabled.
Configures the ADC for buffered or unbuffered mode of operation. If
cleared
, the ADC operates in
unbuffered mode, lowering the power consumption of the device. If
set
, the ADC operates in
buffered mode, allowing the user to place source impedances on the front end without
contributing gain errors to the system.
This bits must be programmed to a logic 0 for correct operation.
Channel Select bits.
Written by the user to select the active analog input channel to the ADC.
CH2
CH1
CH0
Channel
Calibration Pair
0
0
0
AIN1(+) – AIN1(-)
0
0
0
1
AIN2(+) – AIN2(-)
1
0
1
0
AIN3(+) – AIN3(-)
2
0
1
1
AIN1(-) – AIN1(-)
0
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Reserved
1
1
1
VDD Monitor
1
1
0
0
1
1
0
1
0
1
0
1
4
8
16
32
64
128
±625 mV
±312.5 mV
±156.2 mV
±78.125 mV
±39.06 mV
±19.53 mV
CON7-CON6
CON5
0
REF_DET
CON4
BUF
CON3
CON2-CON0
0
CH2-CH0
DATA REGISTER (RS2, RS1, RS0 = 0, 1, 1; POWER-ON/RESET = 0x0000 (AD7798)/ 0X000000 (AD7799))
The conversion result from the ADC is stored in this data register. This is a read-only register. On completion of a read operation from
this register, the RDY bit/pin is set.
ID REGISTER (RS2, RS1, RS0 = 1, 0, 0; POWER-ON/RESET = 0xX8 (AD7798)/ 0xX9 (AD7799))
The Identification Number for the AD7798/AD7799 is stored in the ID register. This is a read-only register.
IO REGISTER (RS2, RS1, RS0 = 1, 0, 1; POWER-ON/RESET = 0x00)
The I/O register is an 8-bit register from which data can be read or to which data can be written. IO0 through IO7 indicate
the bit locations, IO denoting the bits are in the IO register. Table 12 outline the bit designations for the IO register. IO7 denotes the first
bit of the data stream. The number in brackets indicates the power-on/reset default status of that bit.
IO7
IO6
IO5
IO4
0
IOEN(0)
IO2DAT(0)
IO1DAT(0)
Table 12. I/O register Bit Designations
Bit Location
Bit Name
Description
IO7
0
These bits must be programmed to a logic 0 for correct operation.
IO6
IOEN
Configures the pins AIN3(+)/P1 and AIN3(-)/P2 as analog input pins or digital output pins.
When this bit is
set
, the pins are configured as digital output pins P1 and P2.
When this bit is
cleared
, these pins are configured as analog input pins AIN3(+) and AIN3(-).
IO5-IO4
IO2DAT/IO1DAT
P2/P1 Data.
IO3-IO0
0
These bits must be programmed to a logic 0 for correct operation.
IO3
0
IO2
0
IO1
0
IO0
0
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