參數(shù)資料
型號(hào)： AD7734BRU
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 4-Channel, +-10 V Input Range, High Throughput, 24-Bit sigma ∆ ADC
中文描述： 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝： MO-153AE, TSSOP-28
文件頁(yè)數(shù)： 19/32頁(yè)
文件大小： 1542K
代理商： AD7734BRU
AD7734
Channel Setup Registers
8 Bits, Read/Write Register, Address 28h–2Bh, Default Value 00h
These registers are used to configure the selected channel, to configure its input voltage range, and to set up the corresponding channel
status register.
Bit
Mnemonic
Default
Bit 7
0
0
Bit 6
0
0
Bit 5
0
0
Bit 4
Stat OPT
0
Bit 3
ENABLE
0
Bit 2
0
0
Bit 1
RNG1
0
Bit 0
RNG0
0
Bit
7–5
4
Mnemonic
0
Stat OPT
Description
These bits must be 0 for proper operation.
Status Option. When this bit is set to 1, the P0 and P1 bits in the channel status register will reflect the state of
the P0 and P1 pins. When this bit is reset to 0, the RDY bit in the channel status register will reflect the channel
corresponding to the RDY bit in the ADC status register.
Channel Enable. Set this bit to 1 to enable the channel in the continuous conversion mode. A single conversion
will take place regardless of this bit’s value.
This bit must be 0 for proper operation.
This is the channel input voltage range (see Table 15).
3
ENABLE
2
1–0
0
RNG1–RNG0
Table 15.
RNG1
0
0
1
1
RNG0
0
1
0
1
Nominal Input Voltage Range
±10 V
0 V to +10 V
±5 V
0 V to +5 V
Channel Conversion Time Registers
8 Bits, Read/Write Register, Address 30h–33h, Default Value 91h
The conversion time registers enable or disable chopping and configure the digital filter for a particular channel. This register value affects
the conversion time, frequency response, and noise performance of the ADC.
Bit
Mnemonic
Default
Bit 7
CHOP
1
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
FW (7-Bit Filter Word)
11h
Bit
7
6–0
Mnemonic
CHOP
FW
Description
Chopping Enable Bit. Set to 1 to apply chopping mode for a particular channel.
CHOP = 1, single conversion or continuous conversion with one channel enabled.
Conversion Time (μs) = (FW × 128 + 248)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 1, continuous conversion with two or more channels enabled.
Conversion Time (μs) = (FW × 128 + 249)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 0, single conversion or continuous conversion with one channel enabled.
Conversion Time (μs) = (FW × 64 + 206)/MCLK Frequency (MHz), the FW range is 3 to 127.
CHOP = 0, continuous conversion with two or more channels enabled.
Conversion Time (μs) = (FW × 64 + 207)/MCLK Frequency (MHz), the FW range is 3 to 127.
Rev. 0 | Page 19 of 32
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