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參數(shù)資料
| 型號： | AD7734BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, +-10 V Input Range, High Throughput, 24-Bit sigma ∆ ADC |
| 中文描述： | 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | MO-153AE, TSSOP-28 |
| 文件頁數(shù)： | 13/32頁 |
| 文件大?。?/td> | 1542K |
| 代理商： | AD7734BRU |
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AD7734
Pin No.
9
Mnemonic
INTBIAS
Description
This pin provides direct access to the analog input’s common node, bypassing the input
resistor divider. In normal circuit configuration, this pin is left open circuit.
This pin provides direct access to the multiplexer input of Channel 0, bypassing the
input resistor divider. The input voltage range is 0 V to +0.625 V, ±0.625 V, 0 V to +1.25 V,
or ±1.25 V referenced to the INTBIAS pin. In normal circuit configuration, this pin is left
open circuit.
These inputs are used to level shift the analog inputs. These signals are used to ensure
that the differential signal seen by the internal buffer amplifier is within its common-
mode range. The BIAS0 to BIAS3 pins will normally be connected to 2.5 V.
Analog Inputs.
BIASLO, in association with BIASHI, is used to set the analog input common-mode
voltage. Assuming the BIAS0 to BIAS3 and BIASHI pins are connected to 2.5 V, the analog
input voltages are referenced to the voltage at BIASLO. In normal circuit configuration,
this pin should be connected to 0 V.
BIASHI, in association with BIASLO, is used to set the analog input common-mode
voltage. In normal circuit configuration, this pin should be connected to 2.5 V.
Positive Terminal of the Differential Reference Input. REFIN(+) voltage potential can lie
anywhere between AV
DD
and AGND. In normal circuit configuration, this pin should be
connected to a 2.5 V reference voltage.
Negative Terminal of the Differential Reference Input. REFIN(–) voltage potential can lie
anywhere between AV
DD
and AGND. In normal circuit configuration, this pin should be
connected to a 0 V reference voltage.
Ground Reference Point for Analog Circuitry.
Logic Output. Used as a status output in both conversion mode and calibration mode. In
conversion mode, a falling edge on this output indicates that either any channel or all
channels have unread data available, according to the RDYFN bit in the I/O port register.
In calibration mode, a falling edge on this output indicates that calibration is complete
(see the Digital Interface Description section for more details).
Serial data output with serial data being read from the output shift register on the part.
This output shift register can contain information from any AD7734 register, depending
on the address bits of the communications register.
Serial data input (Schmitt triggered) with serial data being written to the input shift
register on the part. Data from this input shift register is transferred to any AD7734
register, depending on the address bits of the communications register
Digital Supply Voltage, 3 V or 5 V Nominal.
Ground Reference Point for Digital Circuitry.
10
MUX0
11, 14, 15, 18
BIAS0–BIAS3
12, 13, 16, 17
19
AIN0–AIN3
BIASLO
20
BIASHI
21
REFIN(+)
22
REFIN(–)
23
24
AGND
RDY
25
DOUT
26
DIN
27
28
DV
DD
DGND
Rev. 0 | Page 13 of 32
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