參數(shù)資料
型號(hào)： AD7732BRU
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 8/32頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT 2-CH 28-TSSOP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 24
采樣率（每秒）： 15.4k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 100mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
輸入數(shù)目和類型： 2 個(gè)差分，單極；2 個(gè)差分，雙極
配用： EVAL-AD7732EBZ-ND - BOARD EVAL FOR AD7732
AD7732
Rev. A | Page 16 of 32
I/O Port Register
8 Bits, Read/Write Register, Address 01h, Default Value 30h + Digital Input Value × 40h
The bits in this register are used to configure and access the digital I/O port on the AD7732.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
P0
P1
P0 DIR
P1 DIR
RDYFN
0
SYNC
Default
P0 Pin
P1 Pin
1
0
Bit
Mnemonic
Description
7, 6
P0, P1
When the P0 and P1 pins are configured as outputs, the P0 and P1 bits determine the pins’ output level. When
the P0 and P1 pins are configured as inputs, the P0 and P1 bits reflect the current input level on the pins.
5, 4
P0 DIR, P1 DIR
These bits determine whether the P0 and P1 pins are configured as inputs or outputs. When set to 1, the
corresponding pin will be an input; when reset to 0, the corresponding pin will be an output.
3
RDYFN
This bit is used to control the function of the RDY pin on the AD7732. When this bit is reset to 0, the RDY pin
goes low when any channel has unread data. When this bit is set to 1, the RDY pin will only go low if all
enabled channels have unread data.
2, 1
0
These bits must be 0 for proper operation.
0
SYNC
This bit enables the SYNC pin function. By default, this bit is 0 and SYNC/P1 can be used as a digital I/O pin.
When the SYNC bit is set to 1, the SYNC pin can be used to synchronize the AD7732 modulator and digital
filter with other devices in the system.
Revision Register
8 Bits, Read-Only Register, Address 02h, Default Value 04h + Chip Revision × 10h
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
Chip Revision Code
Chip Generic Code
Default
x
0
1
0
Bit
Mnemonic
Description
7–4
Chip Revision Code
4-Bit Factory Chip Revision Code
3–0
Chip Generic Code
On the AD7732, these bits will read back as 04h.
Test Register
24 Bits, Read/Write Register, Address 03h
This register is used for testing the part in the manufacturing process. The user must not change the default configuration of this register.
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