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參數資料
型號: AD7732BRU
廠商: Analog Devices Inc
文件頁數: 15/32頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 2-CH 28-TSSOP
標準包裝: 1
位數: 24
采樣率(每秒): 15.4k
數據接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 1
功率耗散(最大): 100mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 28-TSSOP
包裝: 管件
輸入數目和類型: 2 個差分,單極;2 個差分,雙極
配用: EVAL-AD7732EBZ-ND - BOARD EVAL FOR AD7732
AD7732
Rev. A | Page 22 of 32
DIGITAL INTERFACE DESCRIPTION
The RESET pin can be used to reset the AD7732. When not
used, connect this pin to DVDD.
Hardware
The AD7732 serial interface can be connected to the host
device via the serial interface in several different ways.
The AD7732 interface can be reduced to just two wires
connecting the DIN and DOUT pins to a single bidirectional
data line. The second signal in this 2-wire configuration is the
SCLK signal. The host system should change the data line
direction with reference to the AD7732 timing specification
(see the Bus Relinquish Time in Table 2). The AD7732 cannot
operate in the continuous read mode in 2-wire serial interface
configuration.
The CS pin can be used to select the AD7732 as one of several
circuits connected to the host serial interface. When CS is high,
the AD7732 ignores the SCLK and DIN signals and the DOUT
pin goes to the high impedance state. When the CS signal is not
used, connect the CS pin to DGND.
The RDY pin can be polled for high-to-low transition or can
drive the host device interrupt input to indicate that the
AD7732 has finished the selected operation and/or new data
from the AD7732 is available. The host system can also wait a
designated time after a given command is written to the device
before reading. Alternatively, the AD7732 status can be polled.
When the RDY pin is not used in the system, it should be left as
an open circuit. (Note that the RDY pin is always an active
digital output, i.e., it never goes into a high impedance state.)
All the digital interface inputs are Schmitt-Triggered; therefore,
the AD7732 interface features higher noise immunity and can
be easily isolated from the host system via optocouplers.
Figure 13, Figure 14, and Figure 15 outline some of the possible
host device interfaces: SPI without using the CS signal
), a DSP interface (
), and a 2-wire
configuration(
).
SCLK
DIN
DOUT
CS
RDY
RESET
DGND
DVDD DVDD
AD7732
SCK
MOSI
MISO
INT
68HC11
SS
SCLK
DIN
DOUT
CS
RESET
DGND
DVDD
AD7732
P3.1/TXD
P3.0/RXD
8xC51
Figure 13. AD7732 to Host Device Interface, SPI
Figure 15. AD7732 to Host Device Interface, 2-Wire Configuration
SCLK
DIN
DOUT
CS
RDY
RESET
DVDD
AD7732
SCLK
DT
DR
INT
TFS
RFS
ADSP-2105
Figure 14. AD7732 to Host Device Interface, DSP
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