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參數(shù)資料
| 型號： | AD7721ARZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SIGMA-DELTA 28SOIC |
| 標準包裝： | 1,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 468.75k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 150mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 28-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，單極；1 個差分，雙極 |
AD7721
REV. A
–12–
PARALLEL INTERFACE
Read Operation
The device defaults to parallel mode if
CS, RD and WR are not
tied to DGND together. Figure 11 shows a timing diagram for
reading from the AD7721 in the parallel mode. When operating
the device in parallel mode,
CS and RD should be tied to
DGND permanently except when control information is being
written to the AD7721.
DRDY goes high for 2 clock cycles to
indicate that new data is available from the interface. The
AD7721 outputs this data after the falling edge of
DRDY. This
DRDY pin can be used to drive an edge-triggered interrupt of a
microprocessor.
Write Operation
The write operation is used to write data into the control regis-
ter. The outputs of the control register select the analog input
range, allow the part to be put into power-down (standby)
mode, define the function of the DVAL/
SYNC pin, and initiate
the calibration routine. After power-up and after at least 16
clock cycles, the control register must be written to. A cali-
bration must also be performed at least once after power-up to
set the calibration registers. The function of each bit in the
control register is shown in Table I. When writing to the con-
trol register, the
RD pin must be taken high so that the pins D0
to D11 are configured as inputs.
DATA OUT (O)
SCLK (O)
DB0
DB10
DB11
DB12
DB13
DB14
DB15
RFS (I) / DRDY (O)
t2
t3
t4
t5
t6
t8
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
t1
t
9
t7
Figure 10. Serial Mode Output Register Read
DRDY (O)
DB0–DB11 (O)
RD (I)
CS (I)
t12
t11
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
t10
Figure 11. Parallel Mode Output Register Read
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
WR (I)
VALID DATA
CS (I)
DB0–DB11 (I)
t14
t15
t13
Figure 12. Write Timing Diagram
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7721SQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS 16-Bit, 468.75 kHz, Sigma-Delta ADC |
| AD7722 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 195 kSPS CMOS, Sigma-Delta ADC |
| AD7722AS | 制造商:Rochester Electronics LLC 功能描述:16-BIT SIGMA-DELTA CONVERTER I.C. - Bulk 制造商:Analog Devices 功能描述:A/D Converter (A-D) IC |
| AD7722AS-ES | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD7722ASZ | 功能描述:IC ADC 16BIT 195KSPS 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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