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| 型號： | AD7674ACPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT SAR 5V 48LFCSP |
| 產(chǎn)品培訓模塊： | ADC Applications ADC Architectures ADC DC/AC Performance |
| 標準包裝： | 2,500 |
| 系列： | PulSAR® |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 800k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 138mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
| 配用： | EVAL-AD7674CBZ-ND - BOARD EVALUATION FOR AD7674 |
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AD7674
Rev. A | Page 19 of 28
=
π
+
2
)
(
625
25
log
20
N
3dB
–
LOSS
Ne
f
SNR
where:
f–3dB is the –3 dB input bandwidth in MHz of the AD7674
(26 MHz) or the cutoff frequency of the input filter, if used.
N is the noise factor of the amplifiers (1 if in buffer
configuration).
eN is the equivalent input noise voltage of each op amp in
nV/√Hz.
For instance, for a driver with an equivalent input noise of
2 nV/√Hz (e.g., AD8021) configured as a buffer, thus with
a noise gain of +1, the SNR degrades by only 0.34 dB with
the filter in Figure 27, and by 1.8 dB without it.
The driver needs to have a THD performance suitable to
that of the AD7674.
The AD8021 meets these requirements and is usually
appropriate for almost all applications. The AD8021 needs a
10 pF external compensation capacitor, which should have good
linearity as an NPO ceramic or mica type.
The AD8022 could be used if a dual version is needed and gain
of 1 is present. The AD829 is an alternative in applications
where high frequency (above 100 kHz) performance is not
required. In gain of 1 applications, it requires an 82 pF
compensation capacitor. The AD8610 is another option when
low bias current is needed in low frequency applications.
Single-to-Differential Driver
For applications using unipolar analog signals, a single-ended-
to-differential driver will allow for a differential input into the
part. The schematic is shown in Figure 31. When provided an
input signal of 0 to VREF, this configuration will produce a
differential ±VREF with midscale at VREF/2.
If the application can tolerate more noise, the AD8138
differential driver can be used.
U2
8.25k
Ω
2.5V
AD8021
590
Ω
AD7674
IN+
IN– REF
U1
ANALOG INPUT
(UNIPOLAR
0V TO 4.096V)
10pF
AD8021
590
Ω
10pF
10
μF
100nF
1.82k
Ω
2.7nF
15
Ω
2.7nF
15
Ω
REFBUFIN
03083-0-031
Figure 31. Single-Ended-to-Differential Driver Circuit
(Internal Reference Buffer Used)
Voltage Reference
The AD7674 allows the use of an external voltage reference
either with or without the internal reference buffer.
Using the internal reference buffer is recommended when
sharing a common reference voltage between multiple ADCs is
desired.
However, the advantages of using the external reference voltage
directly are:
The SNR and dynamic range improvement (about 1.7 dB)
resulting from the use of a reference voltage very close to
the supply (5 V) instead of a typical 4.096 V reference
when the internal buffer is used
The power saving when the internal reference buffer is
powered down (PDBUF High)
To use the internal reference buffer, PDBUF should be LOW. A
2.5 V reference voltage applied on the REFBUFIN input will
result in a 4.096 V reference on the REF pin.
In both cases, the voltage reference input REF has a dynamic
input impedance and therefore requires an efficient decoupling
between REF and REFGND inputs, The decoupling consists of
a low ESR 47 μF tantalum capacitor connected to the REF and
REFGND inputs with minimum parasitic inductance.
Care should also be taken with the reference temperature
coefficient of the voltage reference, which directly affects the
full-scale accuracy if this parameter matters. For instance, a
±4 ppm/°C temperature coefficient of the reference changes the
full scale by ±1 LSB/°C.
Power Supply
The AD7674 uses three sets of power supply pins: an analog 5 V
supply (AVDD), a digital 5 V core supply (DVDD), and a digital
output interface supply (OVDD). The OVDD supply defines
the output logic level and allows direct interface with any logic
working between 2.7 V and DVDD + 0.3 V. To reduce the
number of supplies needed, the digital core (DVDD) can be
supplied through a simple RC filter from the analog supply, as
shown in Figure 27. The AD7674 is independent of power
supply sequencing once OVDD does not exceed DVDD by
more than 0.3 V, and is therefore free from supply voltage
induced latch-up. Additionally, it is very insensitive to power
supply variations over a wide frequency range, as shown in
Figure 32.
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| AD7675ACPZ | IC ADC 16BIT SAR 100KSPS 48LFCSP |
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| AD7677ACPZ | IC ADC 16BIT DIFF INP 48-LFCSP |
| AD7678ACPZ | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| AD7679ACPZ | IC ADC 18BIT SAR W/BUFF 48LFCSP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7674AST | 制造商:Analog Devices 功能描述:ADC Single SAR 800ksps 18-bit Parallel/Serial 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:18-BIT,800KSPSSARADC - Tape and Reel 制造商:Analog Devices 功能描述:IC 18-BIT ADC |
| AD7674ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 800ksps 18-bit Parallel/Serial 48-Pin LQFP T/R |
| AD7674ASTZ | 功能描述:IC ADC 18BIT 800KSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:PulSAR® 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7674ASTZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC |
| AD7674ASTZL | 制造商:AD 制造商全稱:Analog Devices 功能描述:18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC |
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