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參數(shù)資料
| 型號(hào)： | AD7468BRT |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | ADC |
| 英文描述： | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| 中文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6 |
| 封裝： | MO-178AB, SOT-23, 6 PIN |
| 文件頁(yè)數(shù)： | 9/24頁(yè) |
| 文件大?。?/td> | 327K |
| 代理商： | AD7468BRT |
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–17–
REV. PrF
PRELIMINARY TECHNICAL DATA
AD7466/AD7467/AD7468
POWER CONSUMPTION
The AD7466/67/68 automatically enters power down
mode at the end of each conversion or if
CS is brought
high before the conversion is finished.
When the AD7466/67/68 is in power down mode all the
analog circuitry is powered down and the current
consumption is typically TBD
A.
To achieve the lowest power dissipation, there are some
considerations the user should bear in mind.
The conversion time is determined by the serial clock
frequency. The faster the SCLK frequency, the shorter the
conversion time. This implies as the frequency increases
the part will be dissipating power for a shorter period of
time, when the conversion is taking place, and it will
remain in power down mode for a longer period of time.
Figure 10 shows two AD7466 running with two different
SCLK frequencies, SCLK A and SCLK B, SCLK A
having the higher SCLK frequency. For the same
throughput rate, the AD7466 using SCLK A will have a
shorter conversion time than the AD7466 using SCLK B
and it will remain in power down mode for longer. The
current consumption in power down mode is very low, and
the average power consumption will be greatly reduced.
This can be seen in Figure 11. This figure shows the
Supply current versus SCLK frequency for various supply
voltages at a throughput rate of 100KSPS. For a fixed
throughput rate, the supply current (average current) will
drop as the SCLK frequency increases, due to the fact that
the part will be in power down mode most of the time. It
can also be seen, that for a lower supply voltage the supply
current drops accordingly.
Figure 10. Conversion Time comparison for different SCLK frequencies
for a fixed Throughput rate
SCLK A
1
16
1
16
&6
SCLK B
Conversion Time A
Conversion Time B
1/Throughput
For the AD7468 twelve serial clock cycles are required to
complete the conversion and access the complete conver-
sion result. The AD7468 will automatically enter power
down mode on the 12th SCLK falling edge.
The AD7466 will also enter power down mode, if
CS is
brought high any time before the 16th SCLK falling edge.
The conversion that was initiated by the
CS falling edge
will be terminated and SDATA will go back into three-
state. This also applies for the AD7467 and AD7468, if
CS is brought high before the conversion is complete (the
14th SCLK falling edge for the AD7467, and the 12th
SCLK falling edge for the AD7468) the part will enter
power down, the conversion will be terminated and
SDATA will go back into three-state.
When supplies are first applied to the AD7466/AD7467/
AD7468 a dummy conversion should be performed to
ensure that the part is in power down mode.
CS may idle high until the next conversion or may idle
low until
CS returns high sometime prior to the next
conversion, (effectively idling
CS low).
Once a data transfer is complete (SDATA has returned to
three-state), another conversion can be initiated after the
quiet time, tquiet, has elapsed by bringing
CS low again.
Figure 11. Supply current vs SCLK frequency for a fixed
throughput rate and different supply voltages
60
90
120
150
180
210
240
270
300
330
360
390
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
SCLK FREQUENCY - MHz
S
UP
P
L
Y
CURRE
NT
-
A
VDD = 1.6V
VDD = 3.6V
VDD = 2.7V
VDD = 2.2V
VDD = 1.8V
FSAMPLE = 100 KSPS
Temp = 25
oC
VDD = 3.0V
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PDF描述 |
|---|---|
| AD7466 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7467 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7468 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD746A | Dual Precision, 500 ns Settling, BiFET Op Amp |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7468BRT-R | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRT-R2 | 功能描述:IC ADC 8BIT 1.6V LP SOT-23-6 RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類(lèi)型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類(lèi)型:- |
| AD7468BRT-REEL | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRT-REEL7 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRTZ-REEL | 功能描述:IC ADC 8BIT 1.6V LP SOT23-6 RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類(lèi)型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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