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參數(shù)資料
| 型號： | AD7468BRT |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| 中文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6 |
| 封裝： | MO-178AB, SOT-23, 6 PIN |
| 文件頁數(shù)： | 15/24頁 |
| 文件大小： | 327K |
| 代理商： | AD7468BRT |
–22–
REV. PrF
PRELIMINARY TECHNICAL DATA
AD7466/AD7467/AD7468
AD7466/67/68 to DSP563xx Interface
The connection diagram in Figure 19 shows how the
AD7466/67/68 can be connected to the SSI (Synchronous
Serial Interface) of the DSP563xx family of DSPs from
Motorola. The SSI is operated in Synchronous and
Normal Mode (SYN=1 and MOD=0 in the Control
Register B, CRB) with internally generated 1-bit clock
period frame sync for both Tx and Rx (bits FSL1=1 and
FSL0=0 in the CRB). Set the word length in the Control
Register A (CRA) to 16 by setting bits WL2=0, WL1=1
and WL0=0 for the AD7466. The word length for the
AD7468 can be set to 12 bits (WL2=0, WL1=0 and
WL0=1). This DSP does not offer the option for a 14 bits
word length, so the AD7467 word length will be set up to
16 bits like the AD7466. In this case, the user should bear
in mind that the last two bits will be invalid data as the
SDATA goes back into three-state on the 14th SCLK
falling edge.
The FSP bit in the CRB register can be set to 1, that
means that the frame goes low and a conversion starts.
Likewise, by means of the bits SCD2, SCKD and SHFD
in the CRB register, it will be established that the pin SC2
(the frame sync signal) and SCK in the serial port will be
configured as outputs and the MSB will be shifted first.
To sum up,
MOD=0
SYN=1
WL2, WL1, WL0 depend on the word length
FSL1=1, FSL0=0
FSP=1, negative frame sync
SCD2=1
SCKD=1
SHFD=0
It should be noted that for signal processing applications,
it is imperative that the frame synchronisation signal from
the DSP563xx will provide equidistant sampling.
Figure 18. Interfacing to the ADSP218x
AD7466/67/68*
SCLK
&6
ADSP218x*
*Additional Pins omitted for clarity
SCLK
DR
RFS
TFS
SDATA
Figure 19. Interfacing to the DSP563xx
AD7466/67/68*
SDATA
SCLK
&6
DSP563xx*
*Additional Pins omitted for clarity
SCK
SRD
SC2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7468BRT-R | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRT-R2 | 功能描述:IC ADC 8BIT 1.6V LP SOT-23-6 RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7468BRT-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRT-REEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7468BRTZ-REEL | 功能描述:IC ADC 8BIT 1.6V LP SOT23-6 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個單端，雙極；8 個差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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