參數(shù)資料
型號(hào)： AD7328BRUZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/37頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT+SAR 8CHAN 20-TSSOP
設(shè)計(jì)資源： Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
標(biāo)準(zhǔn)包裝： 2,500
系列： iCMOS®
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 30mW
電壓電源： 雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個(gè)單端，單極；8 個(gè)單端，雙極；4 個(gè)差分，單極；4 個(gè)差分，雙極
AD7328
Data Sheet
Rev. C | Page 14 of 36
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of crosstalk
between any two channels. It is measured by applying a full-scale,
100 kHz sine wave signal to all unselected input channels and
determining the degree to which the signal attenuates in the
selected channel with a 50 kHz signal. Figure 14 shows the worst
case across all eight channels for the AD7328. The analog input
range is programmed to be the same on all channels.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and fb,
any active device with nonlinearities creates distortion products
at sum and difference frequencies of mfa ± nfb, where m, n = 0,
1, 2, 3, and so on. Intermodulation distortion terms are those
for which neither m nor n are equal to 0. For example, the
second-order terms include (fa + fb) and (fa fb), whereas the
third-order terms include (2fa + fb), (2fa fb), (fa + 2fb), and
(fa 2fb).
The AD7328 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second-order terms are usually distanced in
frequency from the original sine waves, whereas the third-order
terms are usually at a frequency close to the input frequencies.
As a result, the second- and third-order terms are specified
separately. The calculation of the intermodulation distortion is
per the THD specification, where it is the ratio of the rms sum
of the individual distortion products to the rms amplitude of
the sum of the fundamentals expressed in decibels.
Power Supply Rejection (PSR)
Variations in power supply affect the full-scale transition but not
the linearity of the converter. Power supply rejection is the
maximum change in the full-scale transition point due to a
change in power supply voltage from the nominal value (see the
Thermal Hysteresis
Thermal hysteresis is defined as the absolute maximum change
of reference output voltage after the device is cycled through
temperature from either
T_HYS+ = +25°C to TMAX to +25°C
or
T_HYS = +25°C to TMIN to +25°C
It is expressed in ppm using the following equation:
6
10
)
C
25
(
)
_
(
)
C
25
(
)
ppm
(
×
°
°
=
REF
HYS
V
HYS
T
V
where:
VREF(25°C) is VREF at 25°C.
VREF(T_HYS) is the maximum change of VREF at T_HYS+ or
T_HYS.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output
at full-scale frequency, f, to the power of a 100 mV sine wave
applied to the common-mode voltage of the VIN+ and VIN
frequency, fS, as
CMRR (dB) = 10 log (Pf/PfS)
where Pf is the power at frequency f in the ADC output, and PfS
is the power at frequency fS in the ADC output (see Figure 17).
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