參數(shù)資料
型號(hào)： AD7328BRUZ-REEL
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 20/37頁(yè)
文件大小： 0K
描述： IC ADC 12BIT+SAR 8CHAN 20-TSSOP
設(shè)計(jì)資源： Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
標(biāo)準(zhǔn)包裝： 2,500
系列： iCMOS®
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 30mW
電壓電源： 雙 ±
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 8 個(gè)單端，單極；8 個(gè)單端，雙極；4 個(gè)差分，單極；4 個(gè)差分，雙極
AD7328
Data Sheet
Rev. C | Page 26 of 36
If a write to one of the range registers is required during a se-
quence, it is necessary to first stop the sequence by writing to
the control register and setting SEQ1 to 0 and SEQ2 to 0. Next,
write to the range register to change the required range. The
previously selected sequence should then be initiated again by
writing to the control register and setting SEQ1 to 0 and SEQ2
to 1. The ADC converts the first channel in the sequence.
The AD7328 can be configured to convert a sequence of con-
secutive channels (see Figure 45). This sequence begins by
converting on Channel 0 and ends with a final channel as selected
by Bit ADD2 to Bit ADD0 in the control register. In this config-
uration, there is no need for a write to the sequence register. To
operate the AD7328 in this mode, set SEQ1 to 1 and SEQ2 to 0
in the control register, and then select the final channel in the
sequence by programming Bit ADD2 to Bit ADD0 in the control
register.
After the control register is configured to operate the AD7328
in this mode, the DIN line can be held low or the write bit can
be set to 0. To return to traditional multichannel operation, a
write to the control register to set SEQ1 to 0 and SEQ2 to 0 is
necessary.
When SEQ1 and SEQ2 are both set to 0 or to 1, the AD7328 is
configured to operate in traditional multichannel mode, where
a write to Channel Address Bit ADD2 to Bit ADD0 in the
control register selects the next channel for conversion.
DIN: WRITE TO RANGE REGISTER 1 TO SELECT THE RANGE
FOR ANALOG INPUT CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 0, ± 10V
RANGE, SINGLE-ENDED MODE.
CS
DIN: WRITE BIT = 0 OR DIN LINE HELD LOW TO CONTINUE
THROUGH SEQUENCE OF CONSECUTIVE CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 1,
RANGE SELECTED IN RANGE REGISTER 1.
CS
DIN: WRITE TO RANGE REGISTER 2 TO SELECT THE RANGE
FOR ANALOG INPUT CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 0,
RANGE SELECTED IN RANGE REGISTER 1,
SINGLE-ENDED MODE.
CS
DIN: WRITE BIT = 0 OR DIN LINE HELD LOW TO CONTINUE
TO CONVERT THROUGH THE SEQUENCE OF
CONSECUTIVE CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 0,
RANGE SELECTED IN RANGE REGISTER 1.
CS
DIN: WRITE TO CONTROL REGISTER TO SELECT THE FINAL
CHANNEL IN THE CONSECUTIVE SEQUENCE, SET SEQ1 = 1
AND SEQ2 = 0. SELECT OUTPUT CODING FOR SEQUENCE.
DOUT: CONVERSION RESULT FROM CHANNEL 0,
RANGE SELECTED IN RANGE REGISTER 1,
SINGLE-ENDED MODE.
CS
POWER ON.
DIN TIED LOW/WRITE BIT = 0.
04852-
032
CONTINUOUSLY CONVERT
ON CONSECUTIVE SEQUENCE
OF CHANNELS.
DIN: WRITE TO CONTROL
REGISTER TO STOP THE
SEQUENCE, SEQ1 = 0, SEQ2 = 0.
DOUT: CONVERSION RESULT
FROM CHANNEL IN SEQUENCE.
CS
STOPPING
A SEQUENCE.
Figure 45. Flowchart for Consecutive Sequence of Channels
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