參數(shù)資料
型號(hào)： AD7265BSUZ-REEL7
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 5/29頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT 3CHAN 1MSPS 32TQFP
設(shè)計(jì)資源： AD7265 in Differential and Single-Ended Configurations Using AD8022 (CN0048)
標(biāo)準(zhǔn)包裝： 500
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 21mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 12 個(gè)單端，單極；6 個(gè)差分，單極；6 個(gè)偽差分，單極
AD7265
Rev. A | Page 12 of 28
The AD7265 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second-order terms are usually distanced in
frequency from the original sine waves, while the third-order
terms are usually at a frequency close to the input frequencies.
As a result, the second-order and third-order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification, where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals expressed in dBs.
Thermal Hysteresis
Thermal hysteresis is defined as the absolute maximum change
of reference output voltage after the device is cycled through
temperature from either
T_HYS+ = +25°C to TMAX to +25°C
or
T_HYS = +25°C to TMIN to +25°C
It is expressed in ppm by
6
10
)
C
25
(
)
_
(
)
C
25
(
)
(
×
°
°
=
REF
HYS
V
HYS
T
V
ppm
V
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the common-mode voltage of V
where:
V
and V
IN+
IN
of
frequency f
REF
(25°C) is VREF at 25°C.
V
S
as
REF
(T_HYS) is the maximum change of VREF at T_HYS+ or
T_HYS.
CMRR (dB) = 10 log(Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
f
P S is the power at frequency fS in the ADC output.
Power Supply Rejection Ratio (PSRR)
Variations in power supply affect the full-scale transition but
not the converter’s linearity. PSRR is the maximum change in
the full-scale transition point due to a change in power supply
voltage from the nominal value (see Figure 4).
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