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參數(shù)資料
| 型號(hào)： | AD7233 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit Serial Mini-DIP DACPORT(12位電壓輸出D/A轉(zhuǎn)換器) |
| 中文描述： | 12位串行微型DIP DACPORT（12位電壓輸出的D / A轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | AD7233 |
AD7233
REV. 0
–4–
PIN FUNCT ION DE SCRIPT ION
Pin
Mnemonic
Description
1
2
3
4
V
DD
SCLK
SDIN
SYNC
Positive Supply (+12 V to +15 V).
Serial Clock, Logic Input. Data is clocked into the input register on each falling SCLK edge.
Serial Data In, Logic Input. T he 16-bit serial data word is applied to this input.
Data Synchronization Pulse, Logic Input. T aking this input low initializes the internal logic in
readiness for a new data word.
Load DAC, Logic Input. Updates the DAC output. T he DAC output is updated on the falling edge of
this signal, or alternatively if this line in permanently low, an automatic update mode is selected whereby
the DAC is updated on the 16th falling SCLK pulse.
Ground Pin = 0 V.
Analog Output Voltage. T his is the buffered DAC output voltage (–5 V to +5 V).
Negative Supply (–12 V to –15 V).
5
LDAC
6
7
8
GND
V
OUT
V
SS
DIGIT AL INT E RFACE
T he AD7233 contains an input serial to parallel shift register
and a DAC latch. A simplified diagram of the input loading cir-
cuitry is shown in Figure 2. Serial data on the SDIN input is
loaded to the input register under control of
SYNC
and SCLK .
When a complete word is held in the shift register it may then be
loaded into the DAC latch under control of
LDAC
. Only the
data in the DAC latch determines the analog output on the
AD7233.
A low
SYNC
input provides the frame synchronization signal
which tells the AD7233 that valid serial data on the SDIN input
will be available for the next 16 falling edges of SCLK . An inter-
nal counter/decoder circuit provides a low gating signal so that
only 16 data bits are clocked into the input shift register. After
16 SCLK pulses the internal gating signal goes inactive (high)
thus locking out any further clock pulses. T herefore, either a
continuous clock or a burst clock source may be used to clock in
the data.
T he
SYNC
input should be taken high after the complete 16-bit
word is loaded in.
Although 16 bits of data are clocked into the input register, only
the latter 12 bits get transferred into the DAC latch. T he first 4
bits in the 16-bit stream are don’t cares since their value does
not affect the DAC latch data. T herefore the data format is 4
don’t cares followed by the 12-bit data word with the LSB as the
last bit in the serial stream.
CIRCUIT INFORMAT ION
D/A Section
T he AD7233 contains a 12-bit voltage-mode D/A converter
consisting of highly stable thin-film resistors and high speed
NMOS single-pole, double-throw switches.
Op Amp Section
T he output of the voltage-mode D/A converter is buffered by a
noninverting CMOS amplifier. T he buffer amplifier is capable
of developing
±
5 V across a 2 k
load to GND.
2R
R
2R
R
R
2R
2R
V
OUT
GND
2R
2R
2R
DB0
DB1
DB9
DB10
DB11
2R
R
R
INTERNAL
REFERENCE
5V
Figure 1. Simplified D/A Converter
V
OUT
LDAC
2
3
4
5
6
7
8
AD7233
TOP VIEW
(Not to Scale)
GND
SDIN
SCLK
V
SS
V
DD
SYNC
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7249AN | LC2MOS Dual 12-Bit Serial DACPORT |
| AD7249AR | LC2MOS Dual 12-Bit Serial DACPORT |
| AD7249BN | LC2MOS Dual 12-Bit Serial DACPORT |
| AD7249BR | Precision, Quad, SPST Analog Switches |
| AD7249SQ | Precision, Quad, SPST Analog Switches |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7233AN | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 12-bit 8-Pin PDIP Tube 制造商:Rochester Electronics LLC 功能描述:SERIAL 12-BIT DACPORT IC - Bulk 制造商:Analog Devices 功能描述:D/A Converter (D-A) |
| AD7233ANZ | 功能描述:IC DAC 12BIT LC2MOS SRL 8-DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類(lèi)型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
| AD7233ANZ | 制造商:Analog Devices 功能描述:D/A Converter (D-A) IC |
| AD7233BN | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 12-bit 8-Pin PDIP Tube 制造商:Analog Devices 功能描述:SEMICONDUCTORSLINEAR |
| AD7233BNZ | 功能描述:IC DAC 12BIT SRL W/AMP 8PDIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類(lèi)型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
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