參數(shù)資料
型號(hào)： AD5933YRSZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 10/40頁
文件大?。?/td> 0K
描述： NETWORK ANALYZER 12B 1MSP 16SSOP
產(chǎn)品培訓(xùn)模塊： AD5933 Impedance to Digital Converter
Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝： 500
分辨率（位）： 12 b
主 fclk： 16.776MHz
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 16-SSOP
包裝： 帶卷 (TR)
配用： EVAL-AD5933EBZ-ND - BOARD EVALUATION FOR AD5933
AD5933
Data Sheet
Rev. E | Page 18 of 40
TWO-POINT CALIBRATION
Alternatively, it is possible to minimize this error by assuming
that the frequency variation is linear and adjusting the gain
factor with a two-point calibration. Figure 23 shows an
impedance profile based on a two-point gain factor calculation.
101.5
98.5
54
66
FREQUENCY (kHz)
IMPED
A
N
C
E
(k
)
101.0
100.5
100.0
99.5
99.0
56
58
60
62
64
VDD = 3.3V
CALIBRATION FREQUENCY = 60kHz
TA = 25°C
MEASURED CALIBRATION IMPEDANCE = 100k
05324-
023
Figure 23. Impedance Profile Using a Two-Point Gain Factor Calculation
TWO-POINT GAIN FACTOR CALCULATION
This is an example of a two-point gain factor calculation
assuming the following:
Output excitation voltage = 2 V (p-p)
Calibration impedance value, ZUNKNOWN = 100.0 k
PGA gain = ×1
Supply voltage = 3.3 V
Current-to-voltage amplifier gain resistor = 100 k
Calibration frequencies = 55 kHz and 65 kHz
Typical values of the gain factor calculated at the two calibration
frequencies read
Gain factor calculated at 55 kHz is 1.031224E-09
Gain factor calculated at 65 kHz is 1.035682E-09
Difference in gain factor (GF) is 1.035682E-09
1.031224E-09 = 4.458000E-12
Frequency span of sweep (F) = 10 kHz
Therefore, the gain factor required at 60 kHz is given by
9
-
10
031224
.
1
kHz
5
kHz
10
12
-
E
458000
.
4
×
+
×
The required gain factor is 1.033453E-9.
The impedance is calculated as previously described.
GAIN FACTOR SETUP CONFIGURATION
When calculating the gain factor, it is important that the receive
stage operate in its linear region. This requires careful selection
of the excitation signal range, current-to-voltage gain resistor,
and PGA gain.
VIN
VDD/2
RFB
ADC
LPF
ZUNKNOWN
VOUT
CURRENT-TO-VOLTAGE
GAIN SETTING RESISTOR
PGA
(×1 OR ×5)
05324-
024
Figure 24. System Voltage Gain
The gain through the system shown in Figure 24 is given by
Gain
PGA
Z
sistor
Setting
Gain
Range
Voltage
Excitation
Ouput
UNKNOWN
×
Re
For this example, assume the following system settings:
VDD = 3.3 V
Gain setting resistor = 200 k
ZUNKNOWN = 200 k
PGA setting = ×1
The peak-to-peak voltage presented to the ADC input is
2 V p-p. However, if a PGA gain of ×5 was chose, the voltage
would saturate the ADC.
GAIN FACTOR RECALCULATION
The gain factor must be recalculated for a change in any of the
following parameters:
Current-to-voltage gain setting resistor
Output excitation voltage
PGA gain
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