參數(shù)資料
型號: AD570JD
廠商: Analog Devices Inc
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC ADC 8BIT MONO W/CLK 18-CDIP
產(chǎn)品變化通告: Redesign Change 26/Apr/2012
標準包裝: 1
位數(shù): 8
采樣率(每秒): 40k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 800mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 18-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 18-CDIP
包裝: 管件
輸入數(shù)目和類型: 1 個單端,單極;1 個單端,雙極
AD570
REV.
–3–
signal, an input current will be generated which exactly matches
the DAC output with all bits on. (The input resistor is trimmed
slightly low to facilitate user trimming, as discussed on the next
page.)
POWER SUPPLY SELECTION
The AD570 is designed and specified for optimum performance
using a +5 V and –15 V supply. The supply current drawn by
the device is a function of the operating mode (BLANK or
CONVERT), as given on the specification page. The supply
currents change only moderately over temperature as shown in
Figure 2, and do not change significantly with changes in V–
from –10.8 volts to –16 volts.
Figure 2. AD570 Power Supply Current vs. Temperature
CONNECTING THE AD570 FOR STANDARD
OPERATION
The AD570 contains all the active components required to per-
form a complete A/D conversion. Thus, for most situations, all
that is necessary is to connect the power supply (+5 V and –15 V),
the analog input, and the conversion start signal. But, there are
some features and special connections which should be consid-
ered for achieving optimum performance. The functional pinout
is shown in Figure 3.
Figure 3. AD570 Pin Connections
ABSOLUTE MAXIMUM RATINGS
V+ to Digital Common . . . . . . . . . . . . . . . . . . . . . 0 V to +7 V
V– to Digital Common . . . . . . . . . . . . . . . . . . 0 V to –16.5 V
Analog Common to Digital Common . . . . . . . . . . . . . . .
±1 V
Analog Input to Analog Common . . . . . . . . . . . . . . . . .
±15 V
Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V+
Digital Outputs (Blank Mode) . . . . . . . . . . . . . . . . . . 0 V to V+
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW
CIRCUIT DESCRIPTION
The AD570 is a complete 8-bit A/D converter which requires
no external components to provide the complete successive-
approximation analog-to-digital conversion function. A block
diagram of the AD570 is shown on last page. Upon receipt of
the CONVERT command, the internal 8-bit current output
DAC is sequenced by the I
2L successive-approximation register
(SAR) from its most-significant bit (MSB) to least-significant
bit (LSB) to provide an output current which accurately bal-
ances the input signal current through the 5 k
input resistor.
The comparator determines whether the addition of each suc-
cessively-weighted bit current causes the DAC current sum to
be greater or less than the input current; if the sum is less the bit
is left on, if more, the bit is turned off. After testing all the bits,
the SAR contains a 8-bit binary code which accurately repre-
sents the input signal to within
±1/2 LSB (0.20%).
Upon completion of the sequence, the DATA READY signal
goes low, and the bit output lines become active high or low
depending on the code in the SAR. When the BLANK and
CONVERT
line is brought high, the output buffers again go
“open”, and the SAR is prepared for another conversion cycle.
The temperature compensated buried Zener reference provides
the primary voltage reference to the DAC and guarantees excel-
lent stability with both time and temperature. The bipolar offset
input controls a switch which allows the positive bipolar offset
current (exactly equal to the value of the MSB less 1/2 LSB)
DATA
READY
DIGITAL
COMMON
BIPOLAR
OFFSET
CONTROL
ANALOG IN
ANALOG COMMON
0.151
THE AD570 IS ALSO AVAILABLE IN A LASER-TRIMMED PASSIVATED
CHIP FORM. CONSULT CHIP CATALOG FOR APPLICATION PARTICULARS.
FIGURE 3 SHOWS THE CHIP METALLIZATION LAYOUT AND BONDING PADS.
BIT 1
MSB
V+
BLANK
&
CONV
V–
0.120
BIT 2 BIT 3
BIT 4 BIT 5
BIT 6
BIT 7
BIT 8
LSB
Figure 1. Chip Bonding Diagram
to be injected into the summing (+) node of the comparator to
offset the DAC output. Thus the nominal 0 V to +10 V unipo-
lar input range becomes a –5 V to +5 V range. The 5 k
thin-
film input resistor is trimmed so that with a full-scale input
B
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