VCC = 1.71 V to" />
參數資料
型號: AD5700BCPZ-RL7
廠商: Analog Devices Inc
文件頁數: 20/24頁
文件大?。?/td> 0K
描述: IC HART MODEM LP 24LFCSP
標準包裝: 1,500
系列: *
Data Sheet
AD5700/AD5700-1
Rev. F | Page 5 of 24
TIMING CHARACTERISTICS
VCC = 1.71 V to 5.5 V, IOVCC = 1.71 V to 5.5 V, TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter1
Limit at TMIN, TMAX
Unit
Description
t1
1
Bit time2 max
Carrier start time. Time from RTS falling edge to carrier reaching its first peak. See
t2
1
Bit time2 max
Carrier stop time. Time from RTS rising edge to carrier amplitude dropping below
the minimum receive amplitude.
t3
1
Bit time2 max
Carrier decay time. Time from RTS rising edge to carrier amplitude dropping to ac
t4
6
Bit times2 max
Carrier detect on. Time from carrier on to CD rising edge. See Figure 5.
t5
6
Bit times2 max
Carrier detect off. Time from carrier off to CD falling edge. See Figure 6.
t6
10
Bit times2 max
Carrier detect on when switching from transmit mode to receive mode in the
presence of a constant valid carrier. Time from RTS rising edge to CD rising edge.
t7
2.1
ms typ
Crystal oscillator power-up time. On application of a valid power supply voltage at
VCC or on enabling of the oscillator via the XTAL_EN pin. Crystal load capacitors =
16 pF.
t8
6
ms typ
Crystal oscillator power-up time. Crystal load capacitors = 36 pF.
t9
25
s typ
Internal oscillator power-up time. On application of a valid power supply voltage
at VCC or on enabling of the oscillator via the CLK_CFG0 and CLK_CFG1 pins.
t10
10
ms typ
Reference power-up time.
t11
30
s typ
Transition time from power-down mode to normal operating mode (external
clock source, external reference).
1
Specifications apply to AD5700/AD5700-1 configured with internal or external receive filter.
2
Bit time is the length of time to transfer one bit of data (1 bit time = 1/1200 Hz = 833.333 s).
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