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| 型號： | AD5590BBC |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC I/O PORT16 W/AMP 80CSPBGA |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 12.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LFBGA，CSPBGA |
| 供應商設備封裝： | 80-CSP-BGA（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 16 個單端，單極 |
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AD5590
Rev. A | Page 24 of 44
Multiplying Bandwidth
The amplifiers within the DAC have a finite bandwidth. The
multiplying bandwidth is a measure of this. A sine wave on the
reference (with full-scale code loaded to the DAC) appears on
the output. The multiplying bandwidth is the frequency at
which the output amplitude falls to 3 dB below the input.
DAC Total Harmonic Distortion (THD)
Total harmonic distortion is the difference between an ideal
sine wave and its attenuated version using the DAC. The sine
wave is used as the reference for the DAC, and the THD is a
measure of the harmonics present on the DAC output. It is
measured in decibels.
ADC Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
ADC Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1 LSB
below the first code transition, and full scale, a point 1 LSB
above the last code transition.
ADC Offset Error
This is the deviation of the first code transition (00…000 to
00…001) from the ideal, that is, ADCGND + 1 LSB.
ADC Offset Error Match
This is the difference in offset error between any two channels.
ADC Gain Error
This is the deviation of the last code transition (111…110
to 111…111) from the ideal (that is, VREFA 1 LSB) after the
offset error has been adjusted out.
ADC Gain Error Match
This is the difference in gain error between any two channels.
ADC Zero-Code Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREFA input range withVREFA
to +VREFA biased about the VREFA point. It is the deviation of the
midscale transition (all 0s to all 1s) from the ideal VIN voltage,
that is, VREFA 1 LSB.
ADC Zero-Code Error Match
This is the difference in ADC zero-code error between any two
channels.
ADC Positive Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREFA input range with VREFA
to +VREFA biased about the VREFA point. It is the deviation of the
last code transition (011…110 to 011…111) from the ideal (that
is, +VREFA 1 LSB) after the zero-code error has been adjusted out.
ADC Positive Gain Error Match
This is the difference in ADC positive gain error between any
two channels.
ADC Negative Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREFA input range with VREFA
to +VREFA biased about the VREFA point. It is the deviation of
the first code transition (100…000 to 100…001) from the
ideal (that is, VREFA + 1 LSB) after the ADC zero-code error
has been adjusted out.
ADC Negative Gain Error Match
This is the difference in negative gain error between any two
channels.
ADC Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale 400 kHz sine wave signal to all 15 nonselected input
channels and determining how much that signal is attenuated
in the selected channel with a 50 kHz signal. The figure is given
worst case across all 16 channels for the ADC.
ADC PSR (Power Supply Rejection)
Variations in power supply affect the full scale transition, but
not the linearity of the converter. Power supply rejection is the
maximum change in full-scale transition point due to a change
in power supply voltage from the nominal value (see the Typical
Performance Characteristics section).
ADC Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track on the 14th
ASCLK falling edge. Track-and-hold acquisition time is the
minimum time required for the track-and-hold amplifier to
remain in track mode for its output to reach and settle to within
±1 LSB of the applied input signal, given a step change to the
input signal.
ADC Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the analog-to-digital converter. The signal is the rms
amplitude of the fundamental. Noise is the sum of all nonfunda-
mental signals up to half the sampling frequency (fS/2), excluding
dc. The ratio is dependent on the number of quantization levels
in the digitization process; the more levels, the smaller the quanti-
zation noise. The theoretical signal-to-(noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is given by
(
)
[dB]
76
.
1
02
.
6
+
=
+
N
Distortion
Noise
to
Signal
Thus, for a 12-bit converter, this is 74 dB.
ADC Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the ADC, it is defined as
1
6
5
4
3
2
V
THD
2
log
20
[dB]
+
×
=
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5, and V6 are the rms amplitudes of the second through the
sixth harmonics.
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