參數(shù)資料
型號： AD5380BST-5
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
中文描述： PARALLEL, WORD INPUT LOADING, 8 us SETTLING TIME, 14-BIT DAC, PQFP100
封裝： 14 X 14 MM, MS-026BED, LQFP-100
文件頁數(shù)： 27/34頁
文件大?。?/td> 975K
代理商： AD5380BST-5
PRELIMINARY TECHNICAL DATA
REV. PrF 09/2003
AD5380
–27–
Figure 13 . 2-Byte AD5380, I2C Write Operation
2-Byte Mode
Two byte mode allows the user update channels sequentially following initialization of this mode. The device address
byte is only required once and the pointer address pointer is configured for auto increment or burst mode.
The user must begin with an address byte (R/
W
= 0) after which the DAC will acknowledge that it is prepared to
receive data by pulling SDA low. The address byte is followed by a specific pointer byte (FF Hex) which initiates
the burst mode of operation. The address pointer initializes to channel zero and the data following the pointer is
loaded to channel 0, the address pointer automatically increments to the next address.
The REG0 and REG 1 bits in the data byte determine the register to be updated. In this mode, following the initial-
ization only the 2-data bytes are required to update a channel, the channel address automatically increments from
address 0 to channel 39 and then returns to the normal 3-byte mode of operation. This mode allows transmission of
data to all channels in one block and reduces the software overhead in configuring all channels. A STOP condition at any
time exits this mode. Toggle mode of operation is not supported in 2-Byte Mode. Figure 13 shows a typical configura-
tion.
A7=1
MOST SIGNIFICANT DATA BYTE
LEAST SIGNIFICANT DATA BYTE
SCL
SDA
REG1
LSB
MSB
LSB
ACK
BY
AD538X
ACK
BY
AD538X
REG0
MSB
CHANNEL 0 DATA
1
0
1
0
1
AD0
R/
W
A0=1
ACK
BY
Converter
ACK
BY
Converter
MSB
ADDRESS BYTE
START
COND
BY
MASTER
SCL
SDA
POINTER BYTE
AD1
A5=1
A4=1
A3=1
A2=1
A1=1
MOST SIGNIFICANT DATA BYTE
LEAST SIGNIFICANT DATA BYTE
SCL
SDA
REG1
LSB
MSB
LSB
ACK
BY
Converter
ACK
BY
Converter
STOP
COND
BY
MASTER
REG0
MSB
MOST SIGNIFICANT DATA BYTE
LEAST SIGNIFICANT DATA BYTE
SCL
SDA
REG1
LSB
MSB
LSB
ACK
BY
Converter
ACK
BY
Converter
REG0
MSB
CHANNEL 1 DATA
CHANNEL N DATA FOLLOWED BY STOP
A6=1
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