TA = 25°C, unless otherwise noted" />
參數(shù)資料
型號(hào): AD5174BRMZ-10
廠商: Analog Devices Inc
文件頁(yè)數(shù): 17/20頁(yè)
文件大?。?/td> 0K
描述: IC DGTL POT 1024POS 10K 10MSOP
產(chǎn)品變化通告: AD5174 Pin Requirement 14/Dec/2010
標(biāo)準(zhǔn)包裝: 50
接片: 1024
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 4 線串行
電源電壓: 2.7 V ~ 5.5 V,±2.5 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
AD5174
Rev. B | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Rating
VDD to GND
–0.3 V to +7.0 V
VSS to GND
+0.3 V to 7.0 V
VDD to VSS
7 V
VA, VW to GND
VSS 0.3 V, VDD + 0.3 V
Digital Input and Output Voltage to GND
0.3 V to VDD + 0.3 V
EXT_CAP to VSS
7 V
IA, IW
Frequency > 10 kHz
±6 mA/d2
Frequency ≤ 10 kHz
Continuous
±6 mA
Operating Temperature Range3
40°C to +125°C
Maximum Junction Temperature
(TJ Maximum)
150°C
Storage Temperature Range
65°C to +150°C
Reflow Soldering
Peak Temperature
260°C
Time at Peak Temperature
20 sec to 40 sec
Package Power Dissipation
(TJ max TA)/θJA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is defined by JEDEC specification JESD-51 and the value is
dependent on the test board and test environment.
Table 4. Thermal Resistance
Package Type
θJA1
θJC
Unit
10-Lead LFCSP
50
3
°C/W
10-Lead MSOP
135
N/A
°C/W
1 JEDEC 2S2P test board, still air (0 m/sec airflow).
ESD CAUTION
1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A and W terminals at a given
resistance.
2 Pulse duty factor.
3 Includes programming of 50-TP memory.
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