參數(shù)資料
型號: AD1981BLJSTZ-REEL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: AC 97 SoundMAX Codec
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: LEAD FREE, MS-026BBC, LQFP-48
文件頁數(shù): 18/32頁
文件大?。?/td> 326K
代理商: AD1981BLJSTZ-REEL
AD1981BL
PCM-OUT VOLUME REGISTER
Index 0x18
Rev. A | Page 18 of 32
Reg
No.
0x18
Name
PCM-Out
Volume
D15
OM
D14
X
D13
X
D12
LOV4
D11
LOV3
D10
LOV2
D9
LOV1
D8
LOV0
D7
RM
1
D6
X
D5
X
D4
ROV4
D3
ROV3
D2
ROV2
D1
ROV1
D0
ROV0
Default
0x8808
1
For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels.
If MSPLT is not set, the RM bit has no effect.
All registers are not shown, and bits containing an X are assumed to be reserved. Refer to Ta
Table 21.
Bit
Mnemonic
Function
ROV [4:0]
Right PCM-Out Volume
Allows setting the PCM right-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to 34.5 dB. The default value is 0 dB, mute enabled.
RM
Right-Channel Mute
Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from
the OM bit. Otherwise, this bit always reads 0 and has no effect when set to 1.
LOV [4:0]
Left PCM-Out Volume
Allows setting the PCM left-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and
the range is +12 dB to 34.5 dB. The default value is 0 dB, mute enabled.
OM
PCM-Out Volume Mute
When this bit is set to 1, both the left and right channels are muted unless the MSPLT bit in
Register 0x76 is set to 1, in which case this mute bit affects only the left channel.
for examples.
ble 22
Table 22. Volume Settings for Line-In, CD Volume, AUX, and PCM-Out
Control Bits
Reg. 0x76
Line-In (0x10), CD (0x12), AUX (0x16), and PCM-Out (0x18)
Left-Channel Volume D [12:8]
Write
Readback
Function
0 0000
0 0000
12 dB Gain
0 1000
0 1000
0 dB Gain
1 1111
1 1111
+34.5 dB
Gain
X XXXX
X XXXX
∞ dB Gain,
Muted
1 1111
1 1111
34.5 dB
Gain
Right-Channel Volume D [4:0]
Write
0 0000
0 1000
1 1111
MSPLT
1
0
0
0
D15
0
0
0
D7
1
X
X
X
Readback
0 0000
0 1000
1 1111
Function
12 dB Gain
0 dB Gain
34.5 dB
Gain
∞ dB Gain,
Muted
∞ dB Gain,
Right Only
Muted
34.5 dB
Gain
0
1
X
X XXXX
X XXXX
1
0
1
X XXXX
X XXXX
1
1
X XXXX
X XXXX
∞ dB Gain,
Left Only
Muted
∞ dB Gain,
Left Muted
0
1 1111
1 1111
1
1
X XXXX
X XXXX
1
X XXXX
X XXXX
∞ dB Gain,
Right Muted
1
For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels.
If MSPLT is not set, the RM bit has no effect.
X is a wild card, and has no effect on the value.
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