參數(shù)資料
型號(hào)： AD1817A
廠商： Analog Devices, Inc.
英文描述： Multimedia Audio Subsystem For Concurrently Processing Multiple Digital Streams Of 16-bit Stereo Audio In Personal Computers.(可處理個(gè)人電腦的16位立體聲多重?cái)?shù)字流的多媒體聲音子系統(tǒng))
中文描述： 多媒體音頻子系統(tǒng)，為同時(shí)處理中的16多個(gè)數(shù)字信息流，在個(gè)人電腦。位立體聲音頻（可處理個(gè)人電腦的16位立體聲多重?cái)?shù)字流的多媒體聲音子系統(tǒng)）
文件頁數(shù)： 26/44頁
文件大小： 269K
代理商： AD1817A
AD1817A
–26–
REV. 0
PRELIMINARY
3
2
1
0
TECHNICAL
T able VII. Sound System Indirect Registers
(High Byte)
5
(Low Byte)
4
LBT D [7:0]
ADDRESS
00 (0x00)
01 (0x01)
02 (0x02)
03 (0x03)
04 (0x04)
05 (0x05)
06 (0x06)
07 (0x07)
08 (0x08)
09 (0x09)
10 (0x0A)
11 (0x0B)
12 (0x0C)
13 (0x0D)
14 (0x0E)
15 (0x0F)
16 (0x10)
17 (0x11)
18 (0x12)
19 (0x13)
20 (0x14)
32 (0x20)
33 (0x21)
34 (0x22)
35 (0x23)
36 (0x24)
37 (0x25)
38 (0x26)
39 (0x27)
40 (0x28)
41 (0x29 )
42 (0x2A)
43 (0x2B)
44 (0x2C)
45 (0x2D)
46 (0x2E)
7
6
4
3
2
1
0
7
6
5
3
2
1
0
RES
PIE
C IE
T IE
VIE
VPSR [15.8]
VCSR [15:8]
RES
RIE
RES
SIE
RES
X C1
X C0
VPSR [7:0]
VCSR [7:0]
LVM
LFMM
RES
RES
LVA [5:0]
LFMA [5:0]
RVM
RFMM
RES
RES
RVA [5:0]
RFMA [5:0]
RES
RES
L S0M
RES
LS0A [5:0]
RS0M
RES
RS0A [5:0]
PBC [15:8]
PCC [15:8]
CBC [15:8]
CCC [15:8]
T BC [15:8]
T CC [15:8]
PBC [7:0]
PCC [7:0]
CBC [7:0]
CCC [7:0]
T BC [7:0]
T CC [7:0]
LMVM
LCDM
LSYM
LVDM
RES
RES
RES
RES
LMVA [4:0]
LCDA [4:0]
LSYA [4:0]
LVDA [4:0]
RMVM
RCDM
RSYM
RVDM
RES
RES
RES
RES
RMVA [4:0]
RCDA [4:0]
RSYA [4:0]
RVDA [4:0]
RES
RES
MCM
LAGC
WSE
M20
RES
MCA [4:0]
PIM
RAGC
RES
PIA [3:0]
RES
LAS [2:0]
RES
LAG [3:0]
RES
RAS [2:0]
RAG [3:0]
CDE
C NP
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
POM
RES
POA [4:0]
RES
HVM
INSEL
HVMAS
HVAT N [4:0]
VMU
VUP
VDN
BM [4:0]
RES
RES
RES
RES
C PD
RES
PIW
PIR
PAA
PDA
PD P
PT B
3D
PD 3D
G PSP
RES
VER [15:8]
RES
VER [7:0]
RES
[00] INDIRE C T LOW BY T E T MP
7
6
5
DE F AUL T = [0xX X ]
2
1
4
7
6
5
4
3
0
RES
LBT D [7:0]
LBT D [7:0] Low Byte T emporary Data holding latch for register pair writes;
Written on any write to [SSBase + 2],
Read from [SSBase + 2] when the indirect address is 0x00.
[01] INT E RRUPT E NABL E AND E X T E RNAL C ONT ROL
7
6
5
4
PIE
C IE
T IE
VIE
DE F AUL T = [0x0102]
2
1
X C1
3
2
1
0
7
6
5
4
3
0
RES
RIE
RES
SIE
RES
X C0
X C0
RW
External Control 0. T he state of this bit is reflected on the X CT L0 pin. T his pin is also muxed with
PCLK O. COF must be greater than 11 for PCLK O to be disabled, see SS [32].
External Control 1. T he state of this bit is reflected on the X CT L1 pin. X CT L1 may also be used for
Ring-In Interrupt.
SoundBlaster Interrupt Enable;
0
SoundBlaster Interrupt disabled
1
SoundBlaster Interrupt enabled
Ring Interrupt Enable;
0
Ring Interrupt disabled
1
Ring Interrupt enabled
Volume Interrupt Enable. If enabled, software increments/decrements BUT T ON MODIFIER via
interrupt routine and pushing buttons only sets VUP, VDN, VMU bits. It does not change the volume.
0
Volume Interrupt disabled
1
Volume Interrupt enabled
X C1
RW
SIE
RW
RIE
RW
VIE
RW
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